sda4: commit the Glaze developer hard-drive dump

Un-ignored: the dev drive is the ground truth the restoration and
emulator work constantly reference (DPL3/LIBDPL + VRENDER i860 renderer
source, BT/RP live+dev game trees, VGL_LABS pod boot, scene/audio
content). Kept in-repo for the pod-owner community.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
This commit is contained in:
Cyd
2026-07-04 19:41:15 -05:00
co-authored by Claude Fable 5
parent 504aef88d4
commit db7745fcd0
19993 changed files with 1983033 additions and 0 deletions
+44
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@@ -0,0 +1,44 @@
#define I_MCWRITE(ADDR) 0x20000 | (((ADDR) & 0x1ff) << 8)
#define I_MCREAD(ADDR) (((ADDR) & 0x1ff) << 8)
#define I_MEMintoENAB(ADDR) ( 0x300 \
| (((ADDR) & 0xff) << 0) )
#define I_ENABandeqMEM(ADDR) ( 0x500 \
| (((ADDR) & 0xff) << 0) \
#define I_ENABoreqMEM(ADDR) ( 0x500 \
| (((ADDR) & 0xff) << 0) \
#define I_ENABandeqMEMBAR(ADDR) ( 0x800 \
| (((ADDR) & 0xff) << 0) )
#define I_SEDGE(ADDR) ( 0x400a00 \
| (((ADDR) & 0xff) << 0) \
#define P_SCMEMA(LSB,LEN,ADDR) ( 0 \
| (((ADDR) & 0xff) << 0) )
#define I_CRYintoMEM(ADDR) ( 0xb300 \
| (((ADDR) & 0xff) << 0) )
#define Ix_CRYintoMEM(ADDR) I_CRYintoMEM(ADDR)
#define I_ENABintoMEM(ADDR) ( 0xb500 \
| (((ADDR) & 0xff) << 0) )
#define Ix_ENABintoMEM(ADDR) I_ENABintoMEM(ADDR)
#define I_MEMoreqENAB(ADDR) ( 0xb700 \
| (((ADDR) & 0xff) << 0) )
#define Ix_MEMoreqENAB(ADDR) I_MEMoreqENAB(ADDR)
#define I_MEMandeqENAB(ADDR) ( 0xb900 \
| (((ADDR) & 0xff) << 0) )
#define Ix_MEMandeqENAB(ADDR) I_MEMandeqENAB(ADDR)
#define I_OVFIX(DST,LEN,ADDR) ( 0x8000e600 \
#define P_OVFIX(DST,LEN,ADDR) ( 0 \
| (((ADDR) & 0xff) << 0) )
#define Ix_OVFIX(DST,LEN,ADDR) I_OVFIX(DST,LEN,ADDR)
#define I_ENABxoreqMEM(ADDR) ( 0x10a00 \
| (((ADDR) & 0xff) << 0) )
#define I_MEMEDGE(ADDR) ( 0x413c00 \
| (((ADDR) & 0xff) << 0) \
#define I_SEDGEBAR(ADDR) ( 0x413f00 \
| (((ADDR) & 0xff) << 0) \
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#if 0
--{{{
--{{{ static int *linterp ( int *coeffptr,
static int *linterp ( int *coeffptr,
int result,
int op1, int op2, int alpha,
int oplen, int alphalen )
{
int i;
IGC_SETENABS ( coeffptr );
IGC_CLEAR ( coeffptr, result, oplen+alphalen );
for (i = 0; i < alphalen; i++) {
IGC_MEMintoENAB ( coeffptr, alpha );
IGC_MEMpluseqMEM ( coeffptr, result, op2, oplen+1, oplen);
IGC_MEMBARintoENAB ( coeffptr, alpha );
IGC_MEMpluseqMEM ( coeffptr, result, op1, oplen+1, oplen);
result++;
alpha++;
}
return coeffptr;
}
--}}}
--{{{
int result,
int op1, int op2, int alpha,
int oplen, int alphalen )
--}}}
--{{{ static int *linterp866 ( int *coeffptr,
static int *linterp866 ( int *coeffptr,
int result,
int op1, int op2, int alpha )
{
/*
linterp866 - takes 2 operands and alpha, each 6 bits, produces an
8-bit result
this is a very tight fit linterp for end-of frame work -
we can afford just 2 6-bit adds, the rest are short
*/
int i;
IGC_SETENABS ( coeffptr );
IGC_CLEAR ( coeffptr, result, 8 );
for (i=0; i<4; i++ ) {
IGC_MEMintoENAB ( coeffptr, alpha );
IGC_MEMpluseqMEM ( coeffptr, result, op2+(4-i), 3+i, 2+i );
IGC_MEMBARintoENAB ( coeffptr, alpha );
IGC_MEMpluseqMEM ( coeffptr, result, op1+(4-i), 3+i, 2+i );
alpha++;
}
for (i=0; i<2; i++ ) {
IGC_MEMintoENAB ( coeffptr, alpha );
IGC_MEMpluseqMEM ( coeffptr, result+i, op2, 7, 6 );
IGC_MEMBARintoENAB ( coeffptr, alpha );
IGC_MEMpluseqMEM ( coeffptr, result+i, op1, 7, 6 );
alpha++;
}
return coeffptr;
}
--}}}
--{{{ static int *linterp865 ( int *coeffptr,
static int *linterp865 ( int *coeffptr,
int result,
int op1, int op2, int alpha )
{
/*
linterp865 - takes 2 operands of 6 bits, and alpha of 5 bits,
produces an 8-bit result
NOTE that this is linterp866 with initial value of i set to 1, not 0 -
note that alpha ranges 1..63
*/
int i=0;
IGC_SETENABS ( coeffptr );
IGC_CLEAR ( coeffptr, result, 8 );
IGC_MEMpluseqMEM ( coeffptr, result, op2+(4-i), 3+i, 2+i );
for (i=1; i<4; i++ ) {
IGC_MEMintoENAB ( coeffptr, alpha );
IGC_MEMpluseqMEM ( coeffptr, result, op2+(4-i), 3+i, 2+i );
IGC_MEMBARintoENAB ( coeffptr, alpha );
IGC_MEMpluseqMEM ( coeffptr, result, op1+(4-i), 3+i, 2+i );
alpha++;
}
for (i=0; i<2; i++ ) {
IGC_MEMintoENAB ( coeffptr, alpha );
IGC_MEMpluseqMEM ( coeffptr, result+i, op2, 7, 6 );
IGC_MEMBARintoENAB ( coeffptr, alpha );
IGC_MEMpluseqMEM ( coeffptr, result+i, op1, 7, 6 );
alpha++;
}
return coeffptr;
}
--}}}
--}}}
#endif
#if 0
--{{{
--{{{ fake spheres
{
#define material_ks(ks) \
(((ks) >> 4) << (dvpx_ks - dvpx_scalar))
#define material_rgb(r,g,b) \
((((r) >> 5) | (((g) >> 5) << 3) | (((b) >> 5) << 6)) << (dvpx_intrinsic - dvpx_scalar))
#define material_specularity(ks) \
(((ks) >> 1) << (dvpx_specularity - dvpx_scalar))
int material;
int r, g, b;
int ks;
int specularity;
float lx, ly, lz;
lx= 5.0f;
ly= -5.0;
lz= 1.2f;
material =material_rgb ( 0, 0, 255 );
material|=material_ks ( 255 );
material|=material_specularity ( 1 );
coeffptr = sphere ( coeffptr, 450.0f, 160.0f, 60.0f,
lx, ly, lz, material );
material =material_rgb ( 0, 255, 0 );
material|=material_ks ( 255 );
material|=material_specularity ( 1 );
coeffptr = sphere ( coeffptr, 410.0f, 100.0f, 40.0f,
lx, ly, lz, material );
material =material_rgb ( 255, 0, 0 );
material|=material_ks ( 255 );
material|=material_specularity ( 1 );
coeffptr = sphere ( coeffptr, 310.0f, 120.0f, 30.0f,
lx, ly, lz, material );
material =material_rgb ( 128, 128, 0 );
material|=material_ks ( 255 );
material|=material_specularity ( 1 );
coeffptr = sphere ( coeffptr, 110.0f, 320.0f, 70.0f,
lx, ly, lz, material );
}
--}}}
--}}}
--{{{ int *dither ( int *coeffptr )
int *dither ( int *coeffptr )
{
/*
dithering works like this - i transmit 'are you a 1 pixel', then
all enabled pixels check that they bits 0..1 & 3 > 1, then add on
1
so we dither on a 2x2 grid in 9 x (check i, ge i, clmpplus)
*/
int checkVal,
ditherVal=34,
enablr =36,
enablg =37,
enablb =38,
tmp1 =39,
tmp2 =40,
pixelPlus=41;
/*
set up pixel identifiers - we scan-convert
0 1 2 3 0 1 2 3 0 1 2 3
3 2 1 0 3 2 1 0 3 2 1 0
into the dither bits
*/
#define dither_bits 1
IGC_SETENABS ( coeffptr );
IGC_CLEAR ( coeffptr, enablr, 3 );
IGC_SCAintoMEM_S1 ( coeffptr, pixelPlus, 9, 2<<dither_bits );
IGC_TREEintoMEM_L3 ( coeffptr, tmp1, 1, 0.0f, 1.0f, 0.1f );
IGC_MEMintoENAB ( coeffptr, tmp1 );
IGC_TREEintoMEM_L3 ( coeffptr, ditherVal, 2, 1.0f, 0.0f, 0.1f );
IGC_ENABINV ( coeffptr );
IGC_TREEintoMEM_L3 ( coeffptr, ditherVal, 2, -1.0f, 0.0f, 0.1f );
--{{{ set tmp on 1 pixels
checkVal=1;
IGC_SETENABS ( coeffptr );
IGC_MEMeqSCA_S1 ( coeffptr, ditherVal, 2, checkVal );
IGC_ENABintoMEM ( coeffptr, tmp2 );
IGC_MEMgeSCA_S1 ( coeffptr, dvpx_eofr+dither_bits-1, 2, checkVal );
IGC_SET ( coeffptr, enablr, 1 );
IGC_MEMintoENAB ( coeffptr, tmp2 );
IGC_MEMgeSCA_S1 ( coeffptr, dvpx_eofg+dither_bits-1, 2, checkVal );
IGC_SET ( coeffptr, enablg, 1 );
IGC_MEMintoENAB ( coeffptr, tmp2 );
IGC_MEMgeSCA_S1 ( coeffptr, dvpx_eofb+dither_bits-1, 2, checkVal );
IGC_SET ( coeffptr, enablb, 1 );
--}}}
--{{{ set tmp on 1 pixels
checkVal=2;
IGC_SETENABS ( coeffptr );
IGC_MEMeqSCA_S1 ( coeffptr, ditherVal, 2, checkVal );
IGC_ENABintoMEM ( coeffptr, tmp2 );
IGC_MEMgeSCA_S1 ( coeffptr, dvpx_eofr+dither_bits-1, 2, checkVal );
IGC_SET ( coeffptr, enablr, 1 );
IGC_MEMintoENAB ( coeffptr, tmp2 );
IGC_MEMgeSCA_S1 ( coeffptr, dvpx_eofg+dither_bits-1, 2, checkVal );
IGC_SET ( coeffptr, enablg, 1 );
IGC_MEMintoENAB ( coeffptr, tmp2 );
IGC_MEMgeSCA_S1 ( coeffptr, dvpx_eofb+dither_bits-1, 2, checkVal );
IGC_SET ( coeffptr, enablb, 1 );
--}}}
--{{{ set tmp on 1 pixels
checkVal=3;
IGC_SETENABS ( coeffptr );
IGC_MEMeqSCA_S1 ( coeffptr, ditherVal, 2, checkVal );
IGC_ENABintoMEM ( coeffptr, tmp2 );
IGC_MEMgeSCA_S1 ( coeffptr, dvpx_eofr+dither_bits-1, 2, checkVal );
IGC_SET ( coeffptr, enablr, 1 );
IGC_MEMintoENAB ( coeffptr, tmp2 );
IGC_MEMgeSCA_S1 ( coeffptr, dvpx_eofg+dither_bits-1, 2, checkVal );
IGC_SET ( coeffptr, enablg, 1 );
IGC_MEMintoENAB ( coeffptr, tmp2 );
IGC_MEMgeSCA_S1 ( coeffptr, dvpx_eofb+dither_bits-1, 2, checkVal );
IGC_SET ( coeffptr, enablb, 1 );
--}}}
IGC_MEMintoENAB ( coeffptr, enablr );
IGC_MEMclmppluseqMEM ( coeffptr, dvpx_eofr, pixelPlus, 9, tmp1 );
IGC_MEMintoENAB ( coeffptr, enablg );
IGC_MEMclmppluseqMEM ( coeffptr, dvpx_eofg, pixelPlus, 9, tmp1 );
IGC_MEMintoENAB ( coeffptr, enablb );
IGC_MEMclmppluseqMEM ( coeffptr, dvpx_eofb, pixelPlus, 9, tmp1 );
IGC_SETENABS ( coeffptr );
IGC_CLEAR ( coeffptr, dvpx_eofr, dither_bits+1 );
IGC_CLEAR ( coeffptr, dvpx_eofg, dither_bits+1 );
IGC_CLEAR ( coeffptr, dvpx_eofb, dither_bits+1 );
return coeffptr;
}
--}}}
#endif
#if 0
#define f_offset(str,field) (((int) &str) - ((int) &(str.field)))
extern int checkdivide ( int num, int denom, int iter );
extern int checkdivide0 ( int num, int denom, int iter );
extern void tracepixelmap ( void );
--{{{ dbgMatrix
int gi=0, gj=0, gk=0, wi=0, wj=0, wk=0;
float worsterr=0.0f;
static void dbgMatrix ( MATRIX m, char *s )
{
int i;
printf (s);
for (i=0; i<4; i++ ) {
printf ( " [ %4.4f, %4.4f, %4.4f, %4.4f ]\n",
m[i][0], m[i][1], m[i][2], m[i][3] );
}
}
--}}}
--{{{ void checkInverse ( MATRIX m, MATRIX inv )
static void checkInverse ( MATRIX m, MATRIX inv )
{
MATRIX conc;
float err=0.0f;
int i, j;
fn_concatenate ( conc, m, inv );
/*
printf ( "Check_inverse at %d, %d, %d\n", gi, gj, gk );
dbgMatrix ( m, "Matrix\n" );
dbgMatrix ( inv, "inverse\n" );
dbgMatrix ( conc, "concatenation - identity?\n" );
*/
for (i=0; i<4; i++ ) {
for (j=0; j<4; j++ ) {
err+=(conc[i][j] * conc[i][j]);
}
}
if (err > worsterr) {
worsterr=err;
wi=gi;
wj=gj;
wk=gk;
}
}
--}}}
--{{{ static void set_vertex ( VERTEX *vert,
static void set_vertex ( VERTEX *vert,
float x, float y, float z,
float diff, float spec, float u, float v )
{
vert->position[0]=x;
vert->position[1]=y;
vert->position[2]=z;
vert->texcoords[0]=u;
vert->texcoords[1]=v;
vert->normcol[0]=diff;
vert->normcol[1]=spec;
}
--}}}
--{{{ static void rms_test ( int (checkdiv_fn)(int, int, int), char *mess, int iter )
static void rms_test ( int (checkdiv_fn)(int, int, int), char *mess, int iter )
{
int res, first, numer, denom;
float error, maxerror, maxnumerr;
float fnum, fden, fres, answer;
int numnum, numden, numres, badnum, badden, badres;
printf ( "RMS test : %s\n", mess );
maxerror=0.0;
numer=127;
while (numer < 65535) {
denom=numer+1;
maxnumerr=0.0;
first=1;
while (denom < 65535) {
res=checkdiv_fn ( numer, denom, iter );
fnum=((float) numer) / 65536.0f;
fden=((float) denom) / 65536.0f;
fres=((float) res ) / 65536.0f;
answer=fnum/fden;
error = sqrt((fres-answer)*(fres-answer));
/*
what is the error as a percentage?
this error is in parts per 64k - turn into parts per 256
*/
error /= 256.0f;
if (error>maxnumerr) {
numnum=numer;
numden=denom;
numres=res;
maxnumerr=error;
}
denom*=11;
denom/=10;
if (first)
printf ("checked %d / %d = %d (%f / %f -> %f) answer = %f\n",
numer, denom, res,
fnum, fden, fres,
answer );
first=0;
}
if (maxnumerr>maxerror) {
badnum=numnum;
badden=numden;
badres=numres;
maxerror=maxnumerr;
}
printf ("num=%d (%f) maxerror=%f abs max error %f\n",
numer, fnum, maxnumerr, maxerror );
printf ("worst combination numer=%d (0x%x) denom=%d (0x%x) res=%d\n",
numnum, numnum, numden, numden, numres );
numer*=11;
numer/=10;
}
}
--}}}
--{{{ static void time_triangles()
static void time_triangles()
{
VERTEX *vert0, *vert1, *vert2, *vert3, *vert4, *vert5;
int j, benny=0;
float then, now;
float materials[5];
int opcode0;
binit=(void *) &safe_binitize_fn;
opcode0 = Ix_MEMintoENAB ( 0 );
vert0=(VERTEX *) malloc( sizeof(VERTEX));
vert1=(VERTEX *) malloc( sizeof(VERTEX));
vert2=(VERTEX *) malloc( sizeof(VERTEX));
vert3=(VERTEX *) malloc( sizeof(VERTEX));
vert4=(VERTEX *) malloc( sizeof(VERTEX));
vert5=(VERTEX *) malloc( sizeof(VERTEX));
if (vert0 == NULL) {
printf ("Failed to malloc vertex\n" );
exit (666);
}
if (vert1 == NULL) {
printf ("Failed to malloc vertex\n" );
exit (666);
}
if (vert2 == NULL) {
printf ("Failed to malloc vertex\n" );
exit (666);
}
if (vert3 == NULL) {
printf ("Failed to malloc vertex\n" );
exit (666);
}
if (vert4 == NULL) {
printf ("Failed to malloc vertex\n" );
exit (666);
}
if (vert5 == NULL) {
printf ("Failed to malloc vertex\n" );
exit (666);
}
materials[0] = 0.0f;
materials[1] = 1.0f;
materials[2] = 2.0f;
materials[3] = 3.0f;
materials[4] = 4.0f;
set_vertex ( vert0, 32.0f, 32.0f, 122.0f,
1.4f, 1.31f, 0.0f, 1.0f );
set_vertex ( vert1, 42.0f, 22.0f, 38.0f,
2.1f, -2.04f, 1.0f, 1.0f );
set_vertex ( vert2, 12.0f, 62.0f, 822.0f,
3.43f, 1.53f, 0.0f, 0.0f );
set_vertex ( vert3, 132.0f, 132.0f, 622.0f,
1.4f, 3.31f, 0.0f, 0.0f );
set_vertex ( vert4, 142.0f, 150.0f, 138.0f,
2.1f, 1.04f, 0.0f, 1.0f );
set_vertex ( vert5, 152.0f, 162.0f, 222.0f,
3.43f, -1.53f, 1.0f, 1.0f );
then=second_();
for (benny=0, j=20; j; j-- ) {
float *coeffs=coeffstore0;
int i;
for (i=0; i<250; i++ ) {
coeffs=tri_zb_f_t ( coeffs, materials[0], opcode0,
(float *)vert3,(float *)vert4,(float *)vert5, binit );
coeffs=tri_zb_f_t ( coeffs, materials[1], opcode0,
(float *)vert0,(float *)vert1,(float *)vert2, binit );
coeffs=tri_zb_f_t ( coeffs, materials[2], opcode0,
(float *)vert3,(float *)vert4,(float *)vert5, binit );
coeffs=tri_zb_f_t ( coeffs, materials[3], opcode0,
(float *)vert0,(float *)vert1,(float *)vert2, binit );
benny+=4;
coeffs=tri_zb_d_s ( coeffs, materials[0], opcode0,
(float *)vert3,(float *)vert4,(float *)vert5, binit );
coeffs=tri_zb_d_s ( coeffs, materials[1], opcode0,
(float *)vert0,(float *)vert1,(float *)vert2, binit );
coeffs=tri_zb_d_s ( coeffs, materials[2], opcode0,
(float *)vert3,(float *)vert4,(float *)vert5, binit );
coeffs=tri_zb_d_s ( coeffs, materials[3], opcode0,
(float *)vert0,(float *)vert1,(float *)vert2, binit );
benny+=4;
coeffs=tri_zb_d_s_t ( coeffs, materials[0], opcode0,
(float *)vert3,(float *)vert4,(float *)vert5, binit );
coeffs=tri_zb_d_s_t ( coeffs, materials[1], opcode0,
(float *)vert0,(float *)vert1,(float *)vert2, binit );
coeffs=tri_zb_d_s_t ( coeffs, materials[2], opcode0,
(float *)vert3,(float *)vert4,(float *)vert5, binit );
coeffs=tri_zb_d_s_t ( coeffs, materials[3], opcode0,
(float *)vert0,(float *)vert1,(float *)vert2, binit );
benny+=4;
coeffs=tri_zb_f ( coeffs, materials[0], opcode0,
(float *)vert3,(float *)vert4,(float *)vert5, binit );
coeffs=tri_zb_f ( coeffs, materials[1], opcode0,
(float *)vert0,(float *)vert1,(float *)vert2, binit );
coeffs=tri_zb_f ( coeffs, materials[2], opcode0,
(float *)vert3,(float *)vert4,(float *)vert5, binit );
coeffs=tri_zb_f ( coeffs, materials[3], opcode0,
(float *)vert0,(float *)vert1,(float *)vert2, binit );
benny+=4;
}
}
now =second_();
printf ("Gosh golly gee - %d triangles pxpl5ized in %f ticks (%f per sec)\n",
benny, now - then, (float) benny / (now - then));
}
--}}}
--{{{ static void trace_triangle_fns ()
static void trace_triangle_fns()
{
printf (" tri_zb_d_s is at 0x%x\n", (int) tri_zb_d_s );
printf (" tri_zb_rgb is at 0x%x\n", (int) tri_zb_rgb );
printf (" tri_zb_f is at 0x%x\n", (int) tri_zb_f );
printf (" tri_zb_f_t is at 0x%x\n", (int) tri_zb_f_t );
printf (" tri_zb_rgb_t is at 0x%x\n", (int) tri_zb_rgb_t );
printf (" tri_zb_d_s_t is at 0x%x\n", (int) tri_zb_d_s_t );
}
--}}}
--{{{ static void time_matrices ()
static void time_matrices ()
{
/* uurgh ? */
int total=0, i=0, j=0, k=0;
float then, now;
MATRIX m, minv;
then=second_();
for (i=0; i<360; i+=13 ) {
gi=i;
/*
printf ("i = %d, current worst=%f at %d,%d,%d \r", i, worsterr, wi,wj,wk );
fflush(stdout);
*/
for (j=0; j<360; j+=13 ) {
gj=j;
for (k=0; k<360; k+=13 ) {
gk=k;
_idmatrix ( m );
_rotX ( m, i, 1 );
_rotY ( m, j, 1 );
_rotZ ( m, k, 1 );
_scale ( m, 32.0, 0.3, 512.6, 1 );
m[3][0] = 2048.0*i;
m[3][1] = -4096.0*j;
m[3][2] = 16384.0*k;
_invert ( minv, m );
checkInverse ( m, minv );
total++;
}
}
}
now=second_();
printf ("Done, %f seconds for %d matrices, worsterr = %f at %d,%d,%d \n",
now-then, total, worsterr, wi, wj, wk );
}
--}}}
#endif
+15
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@@ -0,0 +1,15 @@
.align 8
.text
.globl _getFsr
.align 8
_getFsr::
bri r1
ld.c fsr, r16
.globl _setFsr
.align 8
_setFsr::
bri r1
st.c r16, fsr
File diff suppressed because it is too large Load Diff
+747
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@@ -0,0 +1,747 @@
///*
// * Basic kernel operations, with apologies to the Intel Corp.
// *
// * Copyright (c) Division Ltd. 1991
// *
// * Author Jeff Sullivan
// *
// * SCCS ident: %W% %G%
// */
// #include <sys/trap.h>
// #include <sys/psl.h>
// #include <sys/reg.h>
#define DB_ALIGN .align 32
#define NOP6 nop;nop;nop;nop;nop;nop;nop
// special zero - page locations, expressed as signed quantities for
// the sake of the portland assembler, which must hold addresses as
// unsigned quantities, and so decides that ffffff80 is not within +-
// 32k of 0.!!
SV_PSR = -128
SV_FIR = -124
SV_R1 = -120
SV_ISP = -116
SV_KSP = -112
SV_DB = -108
SV_TSP = -104
SV_TSP1 = -100
RS_PSR = -96
RS_FIR = -92
RS_R1 = -88
RS_ISP = -84
// SV_PSR = 0xfffff000
// SV_FIR = 0xfffff004
// SV_R1 = 0xfffff008
// SV_ISP = 0xfffff00c
// SV_KSP = 0xfffff010
// SV_DB = 0xfffff014
// SV_TSP = 0xfffff018
// SV_TSP1 = 0xfffff01c
// RS_PSR = 0xfffff020
// RS_FIR = 0xfffff024
// RS_R1 = 0xfffff028
// RS_ISP = 0xfffff02c
TLOCK = -80
TRACE = -76
//
// trap handler
//
.globl alltraps
alltraps:
// branch here from 0xffffff00
// save a few registers and the pc (without causing more traps)
// only place we have to store stuff without using a register is
// offset(r0) e.g. first or last 32k
st.l r1,SV_R1(r0)
ld.c db,r1
st.l r1,SV_DB(r0)
st.c r0,db
ld.c fir,r1
st.l r1,SV_FIR(r0)
ld.c psr,r1 //r1 = PSR
st.l r1,SV_PSR(r0)
st.l sp,SV_ISP(r0)
//
// Ensure all trap bits clear to allow indirect branches
//
st.c r0,psr
//
// CHRG DEBUG we are always in Supervisor mode
//
// switch stacks if necessary
// e.g. were in User mode
// and PSR_PU,r1,r0
// bc waskern
// ld.l SV_KSP(r0),sp
waskern:
// nop //fix chip timing bug
// andnot 0xf,sp,sp //re-align sp to quad boundary
// ld.l SV_TSP(r0),r1
// st.l r1,SV_TSP1(r0)
// ld.l SV_PSR(r0),r1
// st.l sp,SV_TSP(r0)
// now that we have a valid stack, save more state
adds -256,sp,sp
adds -64,sp,sp
st.l r16,0(sp)
st.l r17,4(sp)
st.l r18,8(sp)
st.l r19,12(sp)
st.l r20,16(sp)
st.l r21,20(sp)
st.l r22,24(sp)
st.l r23,28(sp)
st.l r24,32(sp)
st.l r25,36(sp)
st.l r26,40(sp)
st.l r27,44(sp)
st.l r28,48(sp)
st.l r29,52(sp)
st.l r30,56(sp)
st.l r31,60(sp)
adds -48,sp,sp
st.l r4,0(sp)
st.l r5,4(sp)
st.l r6,8(sp)
st.l r7,12(sp)
st.l r8,16(sp)
st.l r9,20(sp)
st.l r10,24(sp)
st.l r11,28(sp)
st.l r12,32(sp)
st.l r13,36(sp)
st.l r14,40(sp)
st.l r15,44(sp)
adds -16,sp,sp
st.l r0,0(sp)
ld.l SV_R1(r0),r16
st.l r16,4(sp)
ld.l SV_ISP(r0),r16
st.l r16,8(sp)
st.l fp,12(sp)
//
// figure out trap reason (put in r20)
//
ld.l SV_FIR(r0),r16 // r16 contains fir
// External Interrupt ?
and PSR_IN,r1,r0
bc no_intr
or T_INTRPT,r0,r20
br got_ttype
nop
no_intr:
// Instruction Access Fault ?
and PSR_IAT,r1,r0
bc no_iat
or T_INSFLT,r0,r20
br got_ttype
nop
no_iat:
// Instruction Trap ?
and PSR_IT,r1,r0
bc no_it
// was an IT, but what kind?
ld.l 0(r16),r21 //this cant fault, already checked for IAT
xorh 0x4400,r21,r0 // trap r0,r0,r0
bnc not_bpt
or T_BPTFLT,r0,r20
br got_ttype
nop
not_bpt:
andh 0xffff,r21,r31
xorh 0x47e0,r31,r0 // trap r31,r31,r0
bnc not_sysc
or T_SYSCALL,r0,r20
br got_ttype
nop
not_sysc:
or T_PRIVINFLT,r0,r20
br got_ttype
nop
no_it:
// Floating Point Trap ?
and PSR_FT,r1,r0
bc no_ft
or T_ARITHTRAP,r0,r20
br got_ttype
nop
no_ft:
// Data Access Trap ?
and PSR_DAT,r1,r0
bc no_tbits //should never happen, except for RESET
or T_PAGEFLT,r0,r20
// figure out virtual address (r18)
// r/w (r19)
// align required (r21)
//
// in dual mode must look at fir +4!!
//
and PSR_DIM,r1,r0
bc not_di_mode
addu 4,r16,r16
not_di_mode:
ld.l 0(r16),r17 // instruction (this cant trap since no IAT)
andh 0x2000,r17,r0
bnc not_ld_st
//double check must be 000x.0x or 000x.11 (dont trust fir)
andh 0xe800,r17,r21
bc ls_ok
andh 0xec00,r17,r21
xorh 0x0c00,r21,r0
bc ls_ok
or T_COMPATFLT,r0,r20
br got_ttype
nop
ls_ok:
// ld or st
mov r0,r21
andh 0x1000,r17,r0
bc got_ls_aln
or 1,r21,r21
and 1,r17,r0
bc got_ls_aln
or 2,r21,r21
got_ls_aln:
andh 0x0800,r17,r0
bc is_ld
// st
or 1,r0,r19
// st EA
// const+src2 where const = dest|low11 sign extended
shr 19,r17,r22
and 0x7c,r22,r22
ld.l r22(sp),r22 //src2
shr 5,r17,r23
and 0xf800,r23,r23
and 0x07ff,r17,r24
or r23,r24,r23
shl 16,r23,r23
shra 16,r23,r23
and 1,r21,r24
nop
andnot r24,r23,r23 // adjusted const
br got_datp
adds r23,r22,r18 // EA
// ld
is_ld:
mov r0,r19
// ld EA
and 1,r21,r25
mov r0,r26
// at this point, we have:
// r17 - the instruction
// r25 - low order bits to throw away if const(reg)
// r26 - bit 0 set if we need auto-increment fixup
// r19,r21 already set
gen_ea:
shr 19,r17,r27
and 0x7c,r27,r27 //index of src2 * 4
ld.l r27(sp),r22 //src2
andh 0x0400,r17,r0
bc gen_r_r
// const src1
shl 16,r17,r23
shra 16,r23,r23
nop
andnot r25,r23,r23 // toss some low bits
br ai_fix
nop
// reg src1
gen_r_r:
shr 9,r17,r23
and 0x7c,r23,r23
ld.l r23(sp),r23 // src1
//value of src2 is in r22
//value of src1 is in r23
//index of src2 * 4 is in r27
//flag for autoinc fix in r26
ai_fix:
and 1,r26,r0
bc no_ai_fix
subs r22,r23,r22
adds r27,sp,r26
st.l r22,0(r26)
no_ai_fix:
br got_datp
adds r23,r22,r18
not_ld_st:
//dont trust chip!
//must be one of:
// fld,fst 0010.xx
// pst 0011.11
andh 0xf000,r17,r21
xorh 0x2000,r21,r0
bc fdat_ok
andh 0xfc00,r17,r21
xorh 0x3f00,r21,r0
bc fdat_ok
or T_COMPATFLT,r0,r20
br got_ttype
nop
fdat_ok:
and 1,r17,r26 //need autoinc fix?
or 3,r0,r21
and 2,r17,r0
bnc got_f_aln
or 4,r21,r21
and 4,r17,r0
bc got_f_aln
or 8,r21,r21
got_f_aln:
and 7,r21,r25
andh 0x1000,r17,r0
bnc is_pix
andh 0x0800,r17,r0
bc is_fld
// fst
or 1,r0,r19
br gen_ea
nop
// fld or pfld
is_fld:
mov r0,r19
br gen_ea
nop
// pst
is_pix:
or 1,r0,r19
br gen_ea
nop
got_datp:
br got_ttype
nop
//
// No Trap bits set so Must be Error or RESET
//
no_tbits:
or T_RESET,r0,r20
//
// OK WE HAVE THE TRAP TYPE
//
got_ttype:
adds -16,sp,sp
st.l r1,0(sp) //PSR
ld.l SV_FIR(r0),r16
st.l r16,4(sp) //FIR
st.l r20,8(sp) //trap type
ld.l SV_DB(r0),r16
st.l r16,12(sp) //DB
// clear trap bits in PSR, re-enable interrupts
// andnot 0x1f00,r1,r30
// st.c r30,psr
// call trap()
mov sp,r16
call _trap
// call flush_inv() to flush Data Cache and invalidate Instruction Cache
nop
call _flush_inv
nop
// restore state
.globl ret_user
ret_user:
ld.c psr,r1 //turn off interrupts for now
nop
andnot PSR_IM,r1,r1
st.c r1,psr
ld.l 0(sp),r1 //resume PSR
nop
andnot PSR_IM,r1,r1 //the bri will set PSR_IM
st.l r1,RS_PSR(r0)
ld.l 4(sp),r16
st.l r16,RS_FIR(r0) //resume PC
ld.l 12(sp),r16
st.c r16,db //resume DB
adds 16,sp,sp
ld.l 4(sp),r16
st.l r16,RS_R1(r0) //resume R1
ld.l 8(sp),r16
st.l r16,RS_ISP(r0) //resume SP
ld.l 12(sp),fp //resume FP
adds 16,sp,sp
ld.l 0(sp),r4
ld.l 4(sp),r5
ld.l 8(sp),r6
ld.l 12(sp),r7
ld.l 16(sp),r8
ld.l 20(sp),r9
ld.l 24(sp),r10
ld.l 28(sp),r11
ld.l 32(sp),r12
ld.l 36(sp),r13
ld.l 40(sp),r14
ld.l 44(sp),r15
adds 48,sp,sp
ld.l 0(sp),r16
ld.l 4(sp),r17
ld.l 8(sp),r18
ld.l 12(sp),r19
ld.l 16(sp),r20
ld.l 20(sp),r21
ld.l 24(sp),r22
ld.l 28(sp),r23
ld.l 32(sp),r24
ld.l 36(sp),r25
ld.l 40(sp),r26
ld.l 44(sp),r27
ld.l 48(sp),r28
ld.l 52(sp),r29
ld.l 56(sp),r30
ld.l 60(sp),r31
adds 64,sp,sp
adds 256,sp,sp
or PSR_IT,r1,r1
st.c r1,psr //set return PSR (with trap bit set)
//
// We are always in Supervisor Mode - So no need to restore SP
//
// NBBB BUGGER There seems to be a problem with this load immediately after
// the store to the same page. This results in the sp being
// set to an invalid value.
// st.l sp,SV_KSP(r0) //save kernel sp
// nop // ESSENTIAL FOR READ FIX
// nop // ESSENTIAL FOR READ FIX
// ld.l RS_ISP(r0),sp // return SP
ld.l RS_FIR(r0),r1 // return PC
bri r1
ld.l RS_R1(r0),r1
.globl _vstart
.align 4
_vstart:
//
// Enable Address Translation
// orh h%_kpde,r0,r16
// or l%_kpde,r16,r16
orh 0xffff,r0, r16
or 0xE000,r16,r16
//
// routine to turn on virtual memory
// (almost same as above -- may merge later)
ld.c dirbase,r17
and 0xfff,r17,r17
nop
andnot 0xfff,r16,r16
or DIR_ITI|DIR_ATE,r16,r16
or r17,r16,r16
mov 0xfffff000, r18
or 0x33, r0, r19
st.l r19,4(r18)
DB_ALIGN
st.c r16,dirbase
NOP6
orh h%virt1, r0, r1
or l%virt1, r1, r1
mov 0xfffff000, r18
or 0x34, r0, r19
st.l r19,8(r18)
bri r1
nop
virt1:
mov 0xfffff000, r18
or 0x35, r0, r19
st.l r19,12(r18)
call _flush_inv
nop
orh h%_sbss,r0,r16 // start address of bss in r16
or l%_sbss,r16,r16
mov r0,r17 // zero character in r17
orh h%_zzzend,r0,r18
or l%_zzzend,r18,r18
subs r18,r16,r18 // length of bss in r18
call _memset
nop
mov r0,r16
mov r0,r17
mov r0,r18
// enable interrupts
//
call __main
nop
call _ienable
nop
//
// Setup stdio
//
call __start_buffered_io
nop
//
// set the secret dos variable
//
#ifdef TARGET_DOS
or 1,r0,r31 // initialize DOS flag
orh ha%___PC_DOS,r0,r19
st.l r31,l%___PC_DOS(r19)
#endif
//
// Set up argc, argv, envp
//
adds -8, sp, sp //make room for argc, argv
// call __break_cmd_line // get command line from iserver
adds r0, sp, r16 // pass pointer to mem on stack
ld.l 0(sp), r16 //argc
ld.l 4(sp), r17 //argv
adds r0, r0, r18 //envp
adds 8, sp, sp //clear back stack
//
// Now Call MAIN -- i.e Application
//
call _main
nop
call _exit // main's return value is in r16 already
nop
// flush()
// flush data cache
.globl _flush
_flush:
mov 0xfffff000, r18
or 0x06, r0, r19
st.l r19, 4(r18)
// ld.c psr,r22
// nop
mov 0xfffff000, r18
or 0x09, r0, r19
st.l r19, 8(r18)
or 0x03, r0, r19
st.l r19, 12(r18)
// ld.c dirbase,r17
// nop
mov 0xfffff000, r18
or 0x07, r0, r19
st.l r19, 16(r18)
adds -1,r0,r19
or 127,r0,r20
or l%_bad,r0,r16
orh h%_bad,r16,r16 //pick an unused virtual address
adds -32,r16,r16
mov r16,r21
mov 0xfffff000, r18
or 0x08, r0, r23
st.l r23, 12(r18)
mov r17,r18
nop
andnot 0xf00,r18,r18
or 0x800,r18,r18
mov r18, r23
st.c r18,dirbase //RC = 2, RB = 0
bla r19,r20,flp1
nop
flp1:
ld.l 32(r16),r0
st.l r1,32(r16)
bla r19,r20,flp1
flush 32(r16)++
mov 0xffffff00, r3
or 0x09, r0, r2
st.l r2, 16(r3)
or 0x100,r23,r18
st.c r18,dirbase //RC = 2, RB = 1
or 127,r0,r20
mov r21,r16
adds 4096,r16,r16
bla r19,r20,flp2
nop
flp2:
ld.l 32(r16),r0
st.l r1,32(r16)
bla r19,r20,flp2
flush 32(r16)++
or 0x200,r23,r18
st.c r18,dirbase //RC = 2, RB = 1
or 127,r0,r20
mov r21,r16
adds 4096,r16,r16
bla r19,r20,flp3
nop
flp3:
ld.l 32(r16),r0
st.l r1,32(r16)
bla r19,r20,flp3
flush 32(r16)++
or 0x300,r23,r18
st.c r18,dirbase //RC = 2, RB = 1
or 127,r0,r20
mov r21,r16
adds 4096,r16,r16
bla r19,r20,flp4
nop
flp4:
ld.l 32(r16),r0
st.l r1,32(r16)
bla r19,r20,flp4
flush 32(r16)++
mov 0xffffff00, r3
or 0x0a, r0, r2
st.l r2, 16(r3)
st.c r17,dirbase
NOP6
st.c r22,psr
bri r1
nop
//
// flush data cache and invalidate tlb and instr cache
.globl _flush_inv
_flush_inv:
adds -4,sp,sp
st.l r1,0(sp)
call _flush
nop
ld.l 0(sp),r1
adds 4,sp,sp
//
// intentional fall through
//
// invalidate tlb and instr cache
.globl _inv_tlb_ic
_inv_tlb_ic:
ld.c dirbase,r16
or DIR_ITI,r16,r16
DB_ALIGN
st.c r16,dirbase
NOP6
DB_ALIGN
bri r1
nop
.globl _ienable
_ienable:
ld.c psr,r17
or PSR_IM,r17,r17
st.c r17,psr
bri r1
nop
+108
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#ifndef divpxmap_h
#define divpxmap_h
#if 0
W A R N I N G
DONT USE C-comments - this is included by assembly code!
hence the horrible if 0s
pixel map allocation for pazpl5
#endif
#if 0
The pixel map has 2 distinct regions, scan-conversion variables and
shading variables. The scan-conversion variables are written during
polygon processing. At end-of-frame time some computation is performed,
and what data is left is shifted into the shading variables.
#endif
#if 0
i/o area, defined by hardware
#endif
#define dvpx_io 0
#define dvpx_iobits 32
#if 0
start of scan-conversion variables
#endif
#define dvpx_texz 32
#define dvpx_texzbits 20
#define dvpx_opacity 52
#define dvpx_opaque_50 52
#define dvpx_opaque_25 53
#define dvpx_opaque_12 54
#define dvpx_opacitybits 5
#define dvpx_texu 57
#define dvpx_texubits 20
#define dvpx_texv 77
#define dvpx_texvbits 20
#define dvpx_zbuf 97
#define dvpx_zbufbits 20
#define dvpx_r24 117
#define dvpx_g24 125
#define dvpx_b24 133
#define dvpx_scalar 141
#define dvpx_texsize 141
#define dvpx_texsizebits 2
#define dvpx_texid 143
#define dvpx_texidbits 6
#define dvpx_texrampsel 149
#define dvpx_texrampselbits 2
#define dvpx_texmode 151
#define dvpx_texmodebits 3
#define dvpx_scalarbits 13
#define dvpx_enblpush 154
#if 0
end of scan-conversion variables
currently 5 6 7 8 9 == 5 unallocated bits !!!!! yah-hoo buckaroo
start of end-of-frame variables
#endif
#define dvpx_eofstart 160
#define dvpx_eoftranspz 160
#define dvpx_eoffog 160
#define dvpx_eoffogbits 8
#define dvpx_eofsubu 168
#define dvpx_eofsububits 5
#define dvpx_eofsubv 173
#define dvpx_eofsubvbits 5
#define dvpx_eoftexramp 178
#define dvpx_eoftexrampbits 2
#define dvpx_eoftexmode 180
#define dvpx_eoftexmodebits 3
#define dvpx_eoftextured 183
#define dvpx_eofr 184
#define dvpx_eofg 192
#define dvpx_eofb 200
#else
#endif
+138
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#ifndef divpxmap_h
#define divpxmap_h
#if 0
W A R N I N G
DONT USE C-comments - this is included by assembly code!
hence the horrible if 0s
pixel map allocation for pazpl5
#endif
#if 0
The pixel map has 2 distinct regions, scan-conversion variables and
shading variables. The scan-conversion variables are written during
polygon processing. At end-of-frame time some computation is performed,
and what data is left is shifted into the shading variables.
It is important to try to put all 'scalar' information together, so it
can be sent to pxpl5 in a single operation. The material entry should
contain a (up to ) 32-bit word of scalar information written in a single
operation
Note that an unpleasant side-effect of the pipelining of texture lookup
with scan-conversion is that we have to duplicate some information, such
as r,g,b, specularity, sub-texel coordinates etc. Its the price you pay.
NBB we use the z-buffer to perform texture division; this compromises accuracy
as we only have 20 bits of intermediate precision. In order to buy back 2 more
bits of precision (to make wrapping of textures not eat up precious bits) we
actually use 24 bits for the divide. This means that we H A V E to copy
the 4 bits above the z-buffer into the (now vacant) end-of-frame area, and
then after the divide copy them back.
#endif
#if 0
i/o area, defined by hardware
#endif
#define dvpx_io 0
#if 0
start of scan-conversion variables
#endif
#define dvpx_iobits 32
#define dvpx_texz 32
#define dvpx_texzbits 18
#define dvpx_texu 50
#define dvpx_texubits 18
#define dvpx_texv 68
#define dvpx_texvbits 18
#define dvpx_zbuf 86
#define dvpx_zbufbits 20
#define dvpx_opaque_50 106
#define dvpx_opaque_25 107
#define dvpx_opaque_12 108
#define dvpx_scalar 109
#define dvpx_pixcolourtype 109
#define dvpx_texsize 110
#define dvpx_texsizebits 3
#define dvpx_texid 113
#define dvpx_texidbits 8
#define dvpx_texrampsel 121
#define dvpx_texrampselbits 3
#define dvpx_intrinsic 124
#define dvpx_intrinsicbits 9
#define dvpx_ks 133
#define dvpx_ksbits 4
#define dvpx_r24 124
#define dvpx_g24 132
#define dvpx_diffuse 141
#define dvpx_diffusebits 8
#define dvpx_b24 149
#define dvpx_scalarbits 32
#define dvpx_specular 149
#define dvpx_specularbits 8
#if 0
end of scan-conversion variables
#endif
#if 0
start of end-of-frame variables
#endif
#define dvpx_eofstart 157
#define dvpx_eofenblsave 157
#define dvpx_eofsubu 158
#define dvpx_eofsububits 5
#define dvpx_eofsubv 163
#define dvpx_eofsubvbits 5
#define dvpx_eofr 168
#define dvpx_eofrbits 8
#define dvpx_eofg 176
#define dvpx_eofgbits 8
#define dvpx_eofb 184
#define dvpx_eofbbits 8
#define dvpx_eoftexramp 192
#define dvpx_eoftexrampbits 3
#define dvpx_eofspec 195
#define dvpx_eofspecbits 8
#define dvpx_eofpixtype 203
#define dvpx_eofpixtypebits 2
#define dvpx_punchsave 205
#define dvpx_eoffog 206
#define dvpx_eoffogbits 8
#else
#endif
+46
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@@ -0,0 +1,46 @@
#ifndef DMAengn_h
#define DMAengn_h
#define DMA_GOTO_VAL 0x00000000
#define DMA_SEND_VAL 0x10000000
#define DMA_SENDE_VAL 0x90000000
#define DMA_TILE_VAL 0x20000000
#define DMA_TXDN_VAL 0x30000000
#define DMA_RETE_VAL 0x70000000
#define DMA_STOP_VAL 0xf0000000
#define DMA_FLUSH_VAL 0x60000000
#define DMA_WAIT_VAL 0x80000000
#define DMA_CMD_MASK 0xf0000000
#define DMA_SIZE_MASK 0x7f
#define DMA_GOTO (DMA_GOTO_VAL)
#define DMA_SEND(size) (DMA_SEND_VAL|(size))
#define DMA_SENDE(size) (DMA_SENDE_VAL|(size))
#define DMA_TILE (DMA_TILE_VAL)
#define DMA_TXDN (DMA_TXDN_VAL)
#define DMA_RETE(cpu) (DMA_RETE_VAL|((cpu)<<28))
#define DMA_STOP(cpu) (DMA_STOP_VAL|((cpu)<<28))
#define DMA_FLUSH (DMA_FLUSH_VAL)
#define DMA_WAIT (DMA_WAIT_VAL)
#define DMAop_0(reg,op) \
or (op())&0xffff, r0, reg; \
orh ((op())>>16)&0xffff, reg, reg
#define DMAop_1(reg,op,a) \
or (op(a))&0xffff, r0, reg; \
orh ((op(a))>>16)&0xffff, reg, reg
#define DMAsend_reg(destreg,countreg) \
shl r0, r0, destreg; \
orh (DMA_SEND_VAL >> 16), destreg, destreg; \
or countreg, destreg, destreg
#define DMAsend_poly(destreg,coeff0, coeffptr) \
adds 7, coeffptr, r31; \
subs r31, coeff0, r31; \
shl 3, r31, destreg; \
orh (DMA_SEND_VAL >> 16), destreg, destreg
#endif
+1
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@@ -0,0 +1 @@
iserver /sb y:\control\dnet2\gtmake\compdrv.btl %1 %2 %3 %4 %5 > dump
+105
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@@ -0,0 +1,105 @@
Booting root transputer...ok
pxpl5tst is go
vertices 0x83613ce0 vert0 0x83614820 vert1 0x83614ca0 vert2 0x83615ba0
create_screenbins, 1024 by 512
grabbing screen0bins
grabbing screen1bins
created screenbins
SETENABS 0x 100 CLRENABS 0x 200
TREEltZERO_L3 0x3ae94200 TREEgeZERO_L3 0x3ae80d00
MEMltTREE_l3 0x44ea2120 TREEintoMEM_L0(zbuf) 0x438a4320
TREEintoMEM_L3(diff) 0x3daa4352 TREEintoMEM_L3(spec) 0x3daa435a
TREEintoMEM_L3(texu) 0x41aa4362 TREEintoMEM_L3(texv) 0x41aa4372
TREEintoMEM_L3(texz) 0x41aa4382
Gosh golly gee - 8000 triangles pxpl5ized in 0.133189 ticks (60065.035156 per sec)
Dump of equation memory 0x83612cd0
(0x83612cd0) memory[0] - 0x 100 (0.000001)
(0x83612cd4) memory[1] - 0x3ae94200 (0.001780)
(0x83612cd8) memory[2] - 0xc1900000 (-18.000000)
(0x83612cdc) memory[3] - 0x41200000 (10.000000)
(0x83612ce0) memory[4] - 0xc4840000 (-1056.000000)
(0x83612ce4) memory[5] - 0x3ae94200 (0.001780)
(0x83612ce8) memory[6] - 0xc1400000 (-12.000000)
(0x83612cec) memory[7] - 0x41200000 (10.000000)
(0x83612cf0) memory[8] - 0xc34c0000 (-204.000000)
(0x83612cf4) memory[9] - 0x3ae94200 (0.001780)
(0x83612cf8) memory[10] - 0x41f00000 (30.000000)
(0x83612cfc) memory[11] - 0xc1a00000 (-20.000000)
(0x83612d00) memory[12] - 0x44a50000 (1320.000000)
(0x83612d04) memory[13] - 0x44ea2120 (1873.035156)
(0x83612d08) memory[14] - 0x80000000 (-0.0000000)
(0x83612d0c) memory[15] - 0x80000000 (-0.0000000)
(0x83612d10) memory[16] - 0x3f7fffff (1.000000)
(0x83612d14) memory[17] - 0x438a4320 (276.524414)
(0x83612d18) memory[18] - 0x3daa4352 (0.083136)
(0x83612d1c) memory[19] - 0x3e849bae (0.259000)
(0x83612d20) memory[20] - 0xbdd70a3b (-0.105000)
(0x83612d24) memory[21] - 0xc1976c7f (-18.927977)
(0x83612d28) memory[22] - 0x3daa435a (0.083136)
(0x83612d2c) memory[23] - 0xbea24ddd (-0.317000)
(0x83612d30) memory[24] - 0x3d4ccccc (0.050000)
(0x83612d34) memory[25] - 0x421a3788 (38.554230)
(0x83612d38) memory[26] - 0x41aa4362 (21.282902)
(0x83612d3c) memory[27] - 0x80000000 (-0.0000000)
(0x83612d40) memory[28] - 0x80000000 (-0.0000000)
(0x83612d44) memory[29] - 0x3f7fffff (1.000000)
(0x83612d48) memory[30] - 0x41aa4372 (21.282932)
(0x83612d4c) memory[31] - 0x3e999999 (0.300000)
(0x83612d50) memory[32] - 0xbe2aaaaa (-0.166667)
(0x83612d54) memory[33] - 0xc18ccccc (-17.599998)
(0x83612d58) memory[34] - 0x41aa4382 (21.282963)
(0x83612d5c) memory[35] - 0xbe4ccccc (-0.200000)
(0x83612d60) memory[36] - 0x3e2aaaaa (0.166667)
(0x83612d64) memory[37] - 0x408ccccc (4.400000)
(0x83612d68) memory[38] - 0x 910f734 (0.000000)
(0x83612d6c) memory[39] - 0x3f800000 (1.000000)
(0x83612d70) memory[40] - 0x 100 (0.000001)
(0x83612d74) memory[41] - 0x3ae94200 (0.001780)
(0x83612d78) memory[42] - 0x41200000 (10.000000)
(0x83612d7c) memory[43] - 0x41200000 (10.000000)
(0x83612d80) memory[44] - 0x44200000 (640.000000)
(0x83612d84) memory[45] - 0x3ae94200 (0.001780)
(0x83612d88) memory[46] - 0xc2200000 (-40.000000)
(0x83612d8c) memory[47] - 0xc1f00000 (-30.000000)
(0x83612d90) memory[48] - 0xc5124000 (-2340.000000)
(0x83612d94) memory[49] - 0x3ae94200 (0.001780)
(0x83612d98) memory[50] - 0x41f00000 (30.000000)
(0x83612d9c) memory[51] - 0x41a00000 (20.000000)
(0x83612da0) memory[52] - 0x44c80000 (1600.000000)
(0x83612da4) memory[53] - 0x44ea2120 (1873.035156)
(0x83612da8) memory[54] - 0x 0 (0.0000000)
(0x83612dac) memory[55] - 0x 0 (0.0000000)
(0x83612db0) memory[56] - 0x 0 (0.0000000)
(0x83612db4) memory[57] - 0x438a4320 (276.524414)
(0x83612db8) memory[58] - 0x3daa4352 (0.083136)
(0x83612dbc) memory[59] - 0x3ed374bb (0.413000)
(0x83612dc0) memory[60] - 0x3eaf9db2 (0.343000)
(0x83612dc4) memory[61] - 0xc1b65605 (-22.792002)
(0x83612dc8) memory[62] - 0x3daa435a (0.083136)
(0x83612dcc) memory[63] - 0xbf7ba5e3 (-0.983000)
(0x83612dd0) memory[64] - 0xbf25e354 (-0.648000)
(0x83612dd4) memory[65] - 0x4256020c (53.501999)
(0x83612dd8) memory[66] - 0x41aa4362 (21.282902)
(0x83612ddc) memory[67] - 0x 0 (0.0000000)
(0x83612de0) memory[68] - 0x 0 (0.0000000)
(0x83612de4) memory[69] - 0x3f800000 (1.000000)
before tex_fixz - z1=0.0234 z2=0.0013 z3=0.0352
bump computed as 16
after tex_fixz - z1=0.3744 z2=0.0214 z3=0.5626
tex_scalefac returned 16.000000 (0x41800000)
before tex_fixz - z1=0.2401 z2=0.0180 z3=0.2482
bump computed as 4
after tex_fixz - z1=0.9603 z2=0.0721 z3=0.9928
tex_scalefac returned 4.000000 (0x40800000)
before tex_fixz - z1=0.6157 z2=0.0607 z3=0.4380
bump computed as 1
after tex_fixz - z1=0.6157 z2=0.0607 z3=0.4380
tex_scalefac returned 1.000000 (0x3f800000)
before tex_fixz - z1=0.3948 z2=0.0510 z3=0.1933
bump computed as 2
after tex_fixz - z1=0.7896 z2=0.1021 z3=0.3865
tex_scalefac returned 2.000000 (0x40000000)
+5
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@@ -0,0 +1,5 @@
#include "igctypes.h"
pixel_tile *pixtile;
int fracBits=-1;
+128
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@@ -0,0 +1,128 @@
#ifndef divpxmap_h
#define divpxmap_h
#if 0
W A R N I N G
DONT USE C-comments - this is included by assembly code!
hence the horrible if 0s
pixel map allocation for pazpl5
#endif
#if 0
The pixel map has 2 distinct regions, scan-conversion variables and
shading variables. The scan-conversion variables are written during
polygon processing. At end-of-frame time some computation is performed,
and what data is left is shifted into the shading variables.
It is important to try to put all 'scalar' information together, so it
can be sent to pxpl5 in a single operation. The material entry should
contain a (up to ) 32-bit word of scalar information written in a single
operation
Note that an unpleasant side-effect of the pipelining of texture lookup
with scan-conversion is that we have to duplicate some information, such
as r,g,b, specularity, sub-texel coordinates etc. Its the price you pay.
NBB we use the z-buffer to perform texture division; this compromises accuracy
as we only have 20 bits of intermediate precision. In order to buy back 2 more
bits of precision (to make wrapping of textures not eat up precious bits) we
actually use 24 bits for the divide. This means that we H A V E to copy
the 4 bits above the z-buffer into the (now vacant) end-of-frame area, and
then after the divide copy them back.
#endif
#if 0
i/o area, defined by hardware
#endif
#define dvpx_io 0
#if 0
start of scan-conversion var``iables
NB use of texz - we lose top bit anyway during divide, so drop
its lsb into io area!
#endif
#define dvpx_iobits 32
#define dvpx_texz 31
#define dvpx_texzbits 19
#define dvpx_opacity 50
#define dvpx_opacitybits 4
#define dvpx_texu 54
#define dvpx_texubits 19
#define dvpx_texv 73
#define dvpx_texvbits 19
#define dvpx_zbuf 92
#define dvpx_zbufbits 20
#define dvpx_scalar 112
#define dvpx_pixcolourtype 112
#define dvpx_textype 113
#define dvpx_textypebits 3
#define dvpx_texid 116
#define dvpx_texidbits 6
#define dvpx_texrampsel 122
#define dvpx_texrampselbits 2
#define dvpx_intrinsic 124
#define dvpx_intrinsicbits 9
#define dvpx_scalarbits (dvpx_diffuse-dvpx_scalar)
#define dvpx_diffuse 133
#define dvpx_diffusebits 8
#define dvpx_specular 141
#define dvpx_specularbits 8
#define dvpx_enblpush 149
#if 0
end of scan-conversion variables
start of end-of-frame variables
#endif
#define dvpx_eofstart 151
#define dvpx_eoffog 151
#define dvpx_eoffogbits 8
#define dvpx_eofsubu 159
#define dvpx_eofsububits 5
#define dvpx_eofsubv 164
#define dvpx_eofsubvbits 5
#define dvpx_eofr 169
#define dvpx_eofrbits 8
#define dvpx_eofg 177
#define dvpx_eofgbits 8
#define dvpx_eofb 185
#define dvpx_eofbbits 8
#define dvpx_eoftexramp 193
#define dvpx_eoftexrampbits 2
#define dvpx_eofspec 195
#define dvpx_eofspecbits 8
#define dvpx_eofpixtype 203
#define dvpx_eofpixtypebits 2
#else
#endif
File diff suppressed because it is too large Load Diff
+19
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@@ -0,0 +1,19 @@
#ifndef pp5eof_h
#define pp5eof_h
extern int end_of_frame ( int *bcp );
extern int end_of_texture ( int *bcp );
extern int perspective_divides ( int *coeffptr );
extern int init_screenbin ( binchunk *firstbin,
int pixel_x, int pixel_y, int hires );
extern int end_of_frame_DMA ( int *DMAptr, int *coeffptr );
extern int end_of_textr_DMA ( int *DMAptr, int *coeffptr );
extern int precharge_texture ( int *DMAptr, int *coeffptr, int *end_of_texture );
extern int short_end_of_frame_DMA ( int *DMAptr, int *coeffptr, int *texDMAptr );
#endif
Binary file not shown.
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
+27
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@@ -0,0 +1,27 @@
goto total.c (Editing* C)
goto fold.stp (Editing* Default)
command "fold.cmd"
foldmark "Occam" "--" ""
foldmark "C" "/*" "*/"
foldmark "Pascal" "(*" "*)"
foldmark "Iterm" "#" ""
foldmark "Latex" "%%" ""
foldmark "Asm" ";" ""
foldmark "As860" "\\" ""
foldmark "C++" "//" ""
#{{{ 0 Macro key to type "--" at the beginning of a line
209 45 45 202
#}}}
#{{{ 1 Macro key to say Hello World
72 101 108 108 111 32 87 111 114 108 100
#}}}
#{{{ 3 Macro key to duplicate a fold marker
221 212 211 222 209 246 249 202 211 209 205
#}}}
#{{{ 8 Macro key to search
224
#}}}
#{{{ 9 Macro key to replace
225
#}}}
+231
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@@ -0,0 +1,231 @@
//{{{ _reg_dump
.globl _reg_dump
.align 8
_reg_dump::
//{{{ proc entry - save r1 r2 r3
addu -256, sp, sp
st.l r1,0(sp)
adds 256,sp,r1
// save r2 **before** call into stack frame
st.l r1,4(sp)
st.l fp,8(sp)
//}}}
//{{{ save r4..r31, f2..f31
st.l r4, 12(sp)
st.l r5, 16(sp)
st.l r6, 20(sp)
st.l r7, 24(sp)
st.l r8, 28(sp)
st.l r9, 32(sp)
st.l r10, 36(sp)
st.l r11, 40(sp)
st.l r12, 44(sp)
st.l r13, 48(sp)
st.l r14, 52(sp)
st.l r15, 56(sp)
st.l r16, 60(sp)
//st.l r17, 64(sp)
st.l r18, 68(sp)
st.l r19, 72(sp)
st.l r20, 76(sp)
st.l r21, 80(sp)
st.l r22, 84(sp)
st.l r23, 88(sp)
st.l r24, 92(sp)
st.l r25, 96(sp)
st.l r26, 100(sp)
st.l r27, 104(sp)
st.l r28, 108(sp)
st.l r29, 112(sp)
st.l r30, 116(sp)
st.l r31, 120(sp)
adds 120, sp, sp
fst.l f2, 4(sp)++
fst.l f3, 4(sp)++
fst.l f4, 4(sp)++
fst.l f5, 4(sp)++
fst.l f6, 4(sp)++
fst.l f7, 4(sp)++
fst.l f8, 4(sp)++
fst.l f9, 4(sp)++
fst.l f10, 4(sp)++
fst.l f11, 4(sp)++
fst.l f12, 4(sp)++
fst.l f13, 4(sp)++
fst.l f14, 4(sp)++
fst.l f15, 4(sp)++
fst.l f16, 4(sp)++
fst.l f17, 4(sp)++
fst.l f18, 4(sp)++
fst.l f19, 4(sp)++
fst.l f20, 4(sp)++
fst.l f21, 4(sp)++
fst.l f22, 4(sp)++
fst.l f23, 4(sp)++
fst.l f24, 4(sp)++
fst.l f25, 4(sp)++
fst.l f26, 4(sp)++
fst.l f27, 4(sp)++
fst.l f28, 4(sp)++
fst.l f29, 4(sp)++
fst.l f30, 4(sp)++
fst.l f31, 4(sp)++
adds -240, sp, sp
//}}}
call _trace_regs
mov sp, r16
//{{{ restore all
ld.l 12(sp) , r4
ld.l 16(sp) , r5
ld.l 20(sp) , r6
ld.l 24(sp) , r7
ld.l 28(sp) , r8
ld.l 32(sp) , r9
ld.l 36(sp) , r10
ld.l 40(sp) , r11
ld.l 44(sp) , r12
ld.l 48(sp) , r13
ld.l 52(sp) , r14
ld.l 56(sp) , r15
ld.l 60(sp) , r16
ld.l 64(sp) , r17
ld.l 68(sp) , r18
ld.l 72(sp) , r19
ld.l 76(sp) , r20
ld.l 80(sp) , r21
ld.l 84(sp) , r22
ld.l 88(sp) , r23
ld.l 92(sp) , r24
ld.l 96(sp) , r25
ld.l 100(sp) , r26
ld.l 104(sp) , r27
ld.l 108(sp) , r28
ld.l 112(sp) , r29
ld.l 116(sp) , r30
ld.l 120(sp) , r31
adds 120, sp, sp
fld.l 4(sp)++, f2
fld.l 4(sp)++, f3
fld.l 4(sp)++, f4
fld.l 4(sp)++, f5
fld.l 4(sp)++, f6
fld.l 4(sp)++, f7
fld.l 4(sp)++, f8
fld.l 4(sp)++, f9
fld.l 4(sp)++, f10
fld.l 4(sp)++, f11
fld.l 4(sp)++, f12
fld.l 4(sp)++, f13
fld.l 4(sp)++, f14
fld.l 4(sp)++, f15
fld.l 4(sp)++, f16
fld.l 4(sp)++, f17
fld.l 4(sp)++, f18
fld.l 4(sp)++, f19
fld.l 4(sp)++, f20
fld.l 4(sp)++, f21
fld.l 4(sp)++, f22
fld.l 4(sp)++, f23
fld.l 4(sp)++, f24
fld.l 4(sp)++, f25
fld.l 4(sp)++, f26
fld.l 4(sp)++, f27
fld.l 4(sp)++, f28
fld.l 4(sp)++, f29
fld.l 4(sp)++, f30
fld.l 4(sp)++, f31
adds -240, sp, sp
//}}}
//{{{ proc exit
ld.l 0(sp),r1
ld.l 8(sp),fp
bri r1
addu 256, sp, sp
//}}}
//}}}
// constant for 1/x code
.data
.align 8
.globl _Cmax_x
.globl _Cmax_y
.globl _Cdelta_u
.globl _Cdelta_v
_Cdelta_u:
.long 0x0
_Cdelta_v:
.long 0x0
_Cmax_x: // (0)
.Cmax_x: // (0)
.C640:
.long 0x442fbf5c // 7.02989990E+02
_Cmax_y: // (0)
.Cmax_y: // (0)
.C480:
.long 0x43ff7eb8 // 5.10989990E+02
.fminus_one:
.long 0xbf800000 // -1.00000000E+00
.fminus_256:
.long 0xc37ffd71 // -2.55990005E+02
.C00037: // (0)
.two_point_0: // (0)
.long 0x40000000 // 2.00000000E+00
.eight_point_0: // (0)
.long 0x41000000 // 8.00000000E+00
.four_point_0: // (0)
.long 0x40800000 // 4.00000000E+00
.C362436: // (0)
.long 0x3ecccccd // 4.00000006E-01
//.Czscale1024: // (0)
// .long 0x49800000 // 1.04857600E+06
.Czscale: // (0)
.long 0x497fffff // 1.04857588E+06
.Ctexscale: // (0)
.long 0x477fffff // 6.55359883E+04
_.Cturn_z_to_tex: // (0)
// .long 0x4879999a // 2.55590406E+05
.long 0x48f99980 // 5.11180000E+05
// NB this is now by 4 !!!!!
_.Cturn_z_to_tex_by_4: // (0)
.long 0x47f99980 // 1.27795000E+05
_.Cturn_z_to_tex_by_8: // (0)
.long 0x4779999a // 6.38976016E+04
.r5r6r7opcodes:
.string "r5 r6 r7 have opcodes?"
.byte 0x0
.done_opacity_intro:
.string "done opacity intro"
.byte 0x0
.have_binitized:
.string "have binitized, about to go next_triangle"
.byte 0x0
.run_out_of_coeffs:
.string "run out of coeffstore"
.byte 0x0
.bini_pipe_minimax:
.string "computed minimax piped"
.byte 0x0
+440
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@@ -0,0 +1,440 @@
/*{{{ decls associated with DIVISION pxpl5 implementation*/
#define divpl5_xshift 6
#define divpl5_yshift 7
/*}}} */
/*{{{ on pxpl5 oddness*/
/*
pxpl5 forces you to do 3 things you normally wouldnt do on
a graphics system - edgeize, planarize and binitize primitives
edgeizing involves turning a polygon into a set of edges, each
edge described by an expression of the form f(x,y) = Ax + By + C,
where conventionally a point is INSIDE the edge if f(x,y) > 0 at (x,y)
planarization is pretty similar, and is used for Z-buffering,
Gouraud-shading and texturing. Planarization involves computing a
screen-space planar equation for a given variable - so to Z-buffer,
Gouraud-shade and texture a triangle we need to compute
Z=fz(x,y), r=fr(x,y), g=fg(x,y), b=fb(x,y), u=fu(x,y), v=fv(x,y)
where each of fz, fr, fg, fb, fu, fv are cast as expression of the form
f=Ax + By + C
binitization is different, and stems from the original MIMDness of pxpl5 -
rather than build a 640x512 array of pixel-processors, we use multiple
arrays of 128x128 (or 64x128) and if the polygons scatter statistically
well, we can get many times more performance for a given number of
pixel-processors
in order to do this, as a triangle is transformed to screen-space, we need
to determine how many screen-space regions of 64x128 are overlapped by the
triangle, and place the triangle into 'bins' associated with each region.
binitization may kill me yet.
*/
/*}}} */
/*{{{ typedefs for planarization*/
typedef struct s_bininfo {
int bin_minx;
int bin_miny;
int bin_maxx;
int bin_maxy;
} bininfo;
typedef struct s_preplane {
float x23;
float x31;
float x12;
float C;
} preplane;
/*}}} */
/*{{{ void edgeize ( float *eqn, float *p1, float *p2 )*/
void edgeize ( float *eqn, float *p1, float *p2 )
{
/* *********************
takes 2 point p1 and p2 and computes the edge
equation edge Ax + By + C, +ve inside, -ve outside
the edge
4 cases -
a) p0 b) p1
\ /
\ /
\ /
p1 p0
c) p1 d) p0
\ /
\ /
\ /
p0 p1
We need to ensure that in all cases we treat the edges identically,
e.g a = c with flipped vertices / opcode, ditto b, d
*/
float A, B, C;
/*
however, 1st approximation - this will suffer
rounding errors + DDA cracks
*/
eqn[0]=p1[Y] - p2[Y];
eqn[1]=p2[X] - p1[X];
eqn[2]=(p2[Y]*p1[X]) - (p2[X]*p1[Y]);
}
/*}}} */
/*{{{ on planarization*/
/*
Examination of the equations for planarization, and the UNC rendering
library, indicates some useful speedups for planarizing.
A recurring term is the divisor for all 3 coefficients, termed C. This
is independent of the planarized variable; it only varies with screen-space
X and Y, so can be precomputed once per triangle and re-used for
all planarized expressions
ditto some recurring difference expressions (x1 - x2 etc.)
So preplanarize precomputes the useful stuff into a structure for
subsequent planarizing. Ideally of course we precompute this into
a set of floating-point registers. Later.
Or maybe right now - how many registers do I need to do this?
rx23 \
rx31 > the recurring differences
rx12 /
rC the divisor for preplanarizing; now to planarize, strive to keep
rv1y
rv2y
rv3y
rv1x
rv2x and
rv3x in registers also
so we keep 10 fp registers hanging around, so to planarize a variable
we access memory 3 times, to load
v1
v2
v3 (which are used many times) using up just 13 fp registers
then 3 writes to eqn->A, eqn->B, eqn->C
this should be very fast indeed on an XP
The correct structure for the code is probably a dispatch vector of
C functions associated with each type of triangle - e.g 24-bit Gouraud,
8-bit Gouraud + intrinsic + spec
8-bit Gouraud + intrinsic + spec + texture + MIP etc,
the function calls an assembly stub which preplanarizes, then
repeatedly calls an assembly-coded planarize as many times as needed
Planarization looks like a cost of 25 ticks per planarized variable,
so we can planarize
Z, diffuse, spec in 1.5 uS (667k triangles/sec)
Z, diffuse, spec, u, v, homo in 3uS (333k )
Z, diffuse, spec, u, v, homo, MIP in 3.5uS, or (286k )
it looks like we can edgize in about 20 ticks per edge, or 1.2 uS per
triangle, so the edgize / planarize costs become
Z, diffuse, spec in 2.7 uS (370k triangles/sec)
Z, diffuse, spec, u, v, homo in 4.2 uS (238k )
Z, diffuse, spec, u, v, homo, MIP in 3.5uS, or (212k )
or the VWE benchmark of flat-shaded textured quads -
Z, u, v, homo, MIP in 3.6uS or (278k )
SO we are in shape performance-wise for planarization. How is binitizing.
Read on.
*/
/*}}} */
/*{{{ void preplanarize ( float *coeffs, preplane *p, float *v1, float *v2, float *v3 )*/
void preplanarize ( float *coeffs, preplane *p, float *v1, float *v2, float *v3 )
{
p->x23=v2[X] - v3[X];
p->x31=v3[X] - v1[X];
p->x12=v1[X] - v2[X];
p->C=1.0f / ((v1[X] * (v2[Y] - v3[Y])) +
(v2[X] * (v3[Y] - v1[Y])) +
(v3[X] * (v1[Y] - v2[Y])));
}
/*}}} */
/*{{{ void planarize ( float *eqn, float *v1, float *v2, float *v3, int index, preplane *p )*/
void planarize ( float *eqn, float *v1, float *v2, float *v3, int index, preplane *p )
{
eqn[0]=-p->C* ((v1[Y] * (v2[index] - v3[index])) +
(v2[Y] * (v3[index] - v1[index])) +
(v3[Y] * (v1[index] - v2[index])));
eqn[1]=-p->C*((v1[index] * p->x23) +
(v2[index] * p->x31) +
(v3[index] * p->x12));
eqn[2]= p->C*((v1[X]*((v2[Y]*v3[index]) - (v3[Y]*v2[index]))) +
(v2[X]*((v3[Y]*v1[index]) - (v1[Y]*v3[index]))) +
(v3[X]*((v1[Y]*v2[index]) - (v2[Y]*v1[index]))));
}
/*}}} */
/*{{{ binitizing*/
/*{{{ datastructures for binitizing*/
/* *********************************
what are the best datastructures for binitizing ?
they need working out in conjunction with the DMA engine
protocol
the DMA engine takes, per bin, an array of 64-bit words, organised as
address:count|opcode
the address is where the IGC data resides, the count is the no of
64-bit words in the IGC packet. The packet could be typically a
triangle, a partial triangle, a sphere or a chunk of end-of-frame data
triangles are 30-40 32-bit words long.
a screen may be anything from 512 to 1280 pixels wide, which is from 8
to 64 bins wide, typically 10 (NTSC) - awkward, needs * rather than <<
a typical bin data looks like
address:count
address:count
address:count
...
address:count
in contiguous memory locations. How to assemble these live with
minimal mallocing?
YEAH - good one hardware guys. The macro language supports a GOTO;
so we simply malloc chunks of say 32 64-bit words, and the last one
contains GOTO next chunk. So we never need to memcpy. In fact in the
steady-state we never need to malloc.
So if we have to render a triangle, we have to put its IGC data into
memory, then reference this data from multiple bin lists. All rendered
triangles can be put into a huge pool (double-buffered), which is
just incremented.
So we have the structures in place - how do we binitize?
Lets render a triangle -
pre --> enable voodoo 1
edge 4
edge 4
edge 4
z compare 4
z replace 4
lum 4
spec 4
scalar_stuff 1
p -->
We need to place pre:42 (pre:21?) into all the bins the triangle overlaps
For each bin we need a head chunk, and a tail chunk. Each chunk contains a
count (so I know where to put the next triangle).
I think I am starting to understand how to do this ...
*/
/*}}} */
/*{{{ typedefs / decls for binitization*/
#define BIN_FULL (63*2) /* when index==this, chain into next chunk */
typedef struct s_binchunk {
double DMA_opcodes[64]; /* force dbl-alignment, 64 triangles worth */
int usage; /* in 32-bit words, always dbl-bumped */
struct s_binchunk *next; /* only used for housekeeping */
} binchunk;
typedef struct s_screenbin {
binchunk *head;
binchunk *tail;
} screenbin;
binchunk *free_binchunks=NULL;
screenbin *screen0bins=NULL,
*screen1bins=NULL,
*screenbins =NULL;
int DMAscreen=0, writeScreen=1;
/*}}} */
/*{{{ void create_screenbins ( int screenx, int screeny )*/
void create_screenbins ( int screenx, int screeny )
{
int binsx=screenx >> divpl5_xshift;
int binsy=screeny >> divpl5_yshift;
screen0bins=(screenbin *) malloc (binsx*binsy*sizeof(screenbin));
screen1bins=(screenbin *) malloc (binsx*binsy*sizeof(screenbin));
screenbins=screen0bins;
}
/*}}} */
/*{{{ void liberate_screenbins ( screenbin *screenbins, int screenx, int screeny )*/
void liberate_screenbins ( screenbin *screenbins, int screenx, int screeny )
{
/*
take the whole screen and put it back onto the free list, EXCEPT for
1st chunk in each screen region
*/
int i, j;
for (i=0; i<screenx; i++ ) {
for (j=0; j<screeny; j++ ) {
binchunk *chunk=screenbins->head;
if (chunk == NULL) {
printf ("Error, initially empty region in liberate_screenbins\n" );
}
chunk->usage=0;
chunk=chunk->next;
while (chunk) {
binchunk *nxt=chunk->next;
chunk->next=free_binchunks;
chunk=nxt;
}
screenbins++;
}
}
}
/*}}} */
/*{{{ void grab_binchunks ( int grab_chunks )*/
void grab_binchunks ( int grab_chunks )
{
/* mallocs and inits an initial tranche of binchunks */
int i;
for (i=0; i<grab_chunks; i++ ) {
binchunk *bin,
*prev=free_binchunks;
bin=(binchunk *) malloc( sizeof (binchunk));
if (bin == NULL) {
printf ("Malloc failed in grab_binchunk\n" );
}
bin->usage=0;
bin->next=prev;
prev=bin;
}
}
/*}}} */
/*{{{ binchunk *next_binchunk ()*/
binchunk *next_binchunk ()
{
if (free_binchunks == NULL)
grab_binchunks();
free_binchunks=free_binchunks->next;
return free_binchunks;
}
/*}}} */
/*{{{ void binitize ( int macro_lo, int macro_hi,*/
void binitize ( int macro_lo, int macro_hi,
float fminx, float fminy,
float fmaxx, float fmaxy,
int screen_maxx, int screen_maxy,
int screen_bins_x )
{
/*
binitizes a primitive of known screen-space extents
the DMA engine macros associated with the primitive are held
in macro_lo, macro_hi - typically { SEND macro_address,size }
the screen-space extents are held in fminx .. fmaxy, and
the integer screen resolution is held in screen_maxx, screen_maxy,
with (optimization) the bin-count in the x-direction held in
screen_bins_x
To binitize, we first work out what is the lower left corner bin,
then outer loop in y, inner loop x, dropping the macro into all
encountered bins.
*/
int minx, miny,
maxx, maxy;
minx=(int) fminx;
miny=(int) fminy;
maxx=(int) fmaxx;
maxy=(int) fmaxy;
if (maxx < 0) return;
if (maxy < 0) return;
if (minx > screen_maxx) return;
if (miny > screen_maxy) return;
minx >>= divpl5_xshift;
miny >>= divpl5_yshift;
maxx >>= divpl5_xshift;
maxy >>= divpl5_yshift;
/*
so we have minimax xy in screen-space bin indices -
put the data into bins
*/
{
/* get 1st bin */
screenbin *top_left_bin=&screenbins[(miny*screen_bins_x) + minx];
screenbin *sbin=top_left_bin, *lbin=sbin;
screenbin *xbin=lbin;
register int x;
/* scan down all y bins */
while (y < maxy) {
/* scan across all x bins */
for (x=maxx; x; x-- ) {
/* add doubleword macro to bin */
binchunk *bin=sbin->tail;
register int usage=bin->usage;
if (bin->usage == BIN_FULL) {
binchunk *nextbin=*next_binchunk ();
bin->DMA_opcodes[usage++]=(int) nextbin;
bin->DMA_opcodes[usage++]=DMA_GOTO;
bin=nextbin;
sbin->tail=bin;
usage=0;
}
bin->DMA_opcodes[usage++]=macro_lo;
bin->DMA_opcodes[usage++]=macro_hi;
bin->usage=usage;
xbin++;
}
lbin+=screen_bins_x;
}
}
}
/*}}} */
/*}}} */
File diff suppressed because it is too large Load Diff
+17
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@@ -0,0 +1,17 @@
// nicked from output of PGC Rel 1.4 -opt 2
.text
.align 8
.text
#define trace_regs(label)\
adds -16, sp, sp; \
st.l r1, 4(sp); \
adds -256, sp, sp; \
st.l r17, 64(sp); \
orh ha%label, r0, r17; \
or l%label, r17, r17; \
call _reg_dump; \
adds 256, sp, sp; \
ld.l 4(sp), r1; \
adds 16, sp, sp
+6
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@@ -0,0 +1,6 @@
hello.o
y:\control\gt860el\pgi\lib\libm.a
y:\control\gt860el\pgi\lib\libc.a
y:\control\gt860el\pgi\lib\libiserv.a
y:\control\gt860el\pgi\lib\pgclib.a
y:\control\gt860el\pgi\lib\crtn.o
+576
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@@ -0,0 +1,576 @@
/* basic memory operations */
#include "igctypes.h"
#include "emcarray.h"
--{{{ pixel memory access macros
#define read_pixmem_bit(pixel,bit) (1 & (pixel->memory[((bit)>>3)] >> ((bit) & 7)))
#define write_pixmem_bit(pixel,bit,val) \
do { \
if ((val)) \
pixel->memory[((bit)>>3)]|=(1<<((bit)&7)); \
else \
pixel->memory[((bit)>>3)]&=~(1<<((bit)&7)); \
} while (0)
--}}}
--{{{ int read_pixmem_word ( pixel_memory *pixel, int bit0, int bits, int sextend )
int read_pixmem_word ( pixel_memory *pixel, int bit0, int bits, int sextend )
{
int res=0;
register int bitval, bit, shift=0;
for ( bit=0; bit<bits; bit++ ) {
bitval=read_pixmem_bit(pixel, bit0+bit );
res|=bitval<<shift;
shift++;
}
if (sextend && bitval) {
res|=((-1) ^ (((1<<shift)) - 1));
}
return res;
}
--}}}
--{{{ void write_pixmem_word ( pixel_memory *pixel, int bit0, int bits, int val )
void write_pixmem_word ( pixel_memory *pixel, int bit0, int bits, int val )
{
register int bit, shift=0;
for ( bit=0; bit<bits; bit++ ) {
write_pixmem_bit ( pixel, bit0+bit, val&1 );
val>>=1;
}
}
--}}}
--{{{ int eval_ltree ( pixel_memory *pixel, int x, int y, float A, float B, float C )
int eval_ltree ( pixel_memory *pixel, int x, int y, float A, float B, float C )
{
float eval, fx, fy;
fx=(float) x;
fy=(float) y;
eval=(fx*A) + (fy*B) + C;
return (int) eval;
}
--}}}
--{{{ int eval_qtree ( pixel_memory *pixel,
int eval_qtree ( pixel_memory *pixel,
int x, int y,
float A, float B, float C, float D, float E, float F )
{
float eval, fx, fy;
fx=(float) x;
fy=(float) y;
eval=(fx*A) + (fy*B) + C + (fx*fx*D) + (fy*fy*E) + (fx*fy*F);
return (int) eval;
}
--}}}
/* IGC command set ! */
--{{{ INSTRUCTIONS TO MODIFY THE ENABLE REGISTER
/*
how to make this easier? i need to pass a totally general function
to each pixel in the tile, so I need
*/
typedef pixel_function (
--{{{ void FBITS (int n )
void FBITS (int n )
{
fracBits = n;
}
--}}}
--{{{ void CLRENABS ()
void CLRENABS ()
{
int x, y;
for (x=0; x<tile_x; x++ )
for (y=0; y<tile_y; y++ ) {
pixtile->array[x+(y<<tile_x_bits))]->enable=0;
}
}
}
--}}}
--{{{ void SETENABS ()
void SETENABS ()
{
{
int x, y;
for (x=0; x<tile_x; x++ )
for (y=0; y<tile_y; y++ ) {
pixtile->array[x+(y<<tile_x_bits))]->enable=1;
}
}
}
}
--}}}
--{{{ void ENABINV ()
void ENABINV ()
{
{
int x, y;
for (x=0; x<tile_x; x++ )
for (y=0; y<tile_y; y++ ) {
pixtile->array[x+(y<<tile_x_bits))]->enable=^1;
}
}
}
}
--}}}
--{{{ void MEMintoENAB ()
void MEMintoENAB ()
{
}
--}}}
--{{{ void TREEeqZERO ()
void TREEeqZERO ()
{
}
--}}}
--{{{ void TREEqeZERO ()
void TREEqeZERO ()
{
}
--}}}
--{{{ void TREEltZERO ()
void TREEltZERO ()
{
}
--}}}
--{{{ void MESH ( int len )
void MESH ( int len )
{
}
--}}}
--{{{ void GRID ( int len )
void GRID ( int len )
{
}
--}}}
--{{{ void MEMeqZERO ( int src, int slen )
void MEMeqZERO ( int src, int slen )
{
}
--}}}
--{{{ void MEMeqONES ( int src, int slen )
void MEMeqONES ( int src, int slen )
{
}
--}}}
--{{{ void MEMneZERO ( int src, int slen )
void MEMneZERO ( int src, int slen )
{
}
--}}}
--{{{ void MEMeqSCA ( int src, int slen )
void MEMeqSCA ( int src, int slen )
{
}
--}}}
--{{{ void MEMgeSCA ( int src, int slen )
void MEMgeSCA ( int src, int slen )
{
}
--}}}
--{{{ void MEMgtSCA ( int src, int slen )
void MEMgtSCA ( int src, int slen )
{
}
--}}}
--{{{ void MEMeqMEM ( int lsrc, int src, int slen )
void MEMeqMEM ( int lsrc, int src, int slen )
{
}
--}}}
--{{{ void MEMneMEM ( int lsrc, int src, int slen )
void MEMneMEM ( int lsrc, int src, int slen )
{
}
--}}}
--{{{ void MEMgeMEM ( int lsrc, int src, int slen )
void MEMgeMEM ( int lsrc, int src, int slen )
{
}
--}}}
--{{{ void MEMgtMEM ( int lsrc, int src, int slen )
void MEMgtMEM ( int lsrc, int src, int slen )
{
}
--}}}
--{{{ void MEM2geMEM2 ( int lsrc, int src, int slen )
void MEM2geMEM2 ( int lsrc, int src, int slen )
{
}
--}}}
--{{{ void MEM2gtMEM2 ( int lsrc, int src, int slen )
void MEM2gtMEM2 ( int lsrc, int src, int slen )
{
}
--}}}
--{{{ void MEMeqTREE ( int src, int len )
void MEMeqTREE ( int src, int len )
{
}
--}}}
--{{{ void MEMneTREE ( int src, int len )
void MEMneTREE ( int src, int len )
{
}
--}}}
--{{{ void MEMleTREE ( int src, int len )
void MEMleTREE ( int src, int len )
{
}
--}}}
--{{{ void MEMltTREE ( int src, int len )
void MEMltTREE ( int src, int len )
{
}
--}}}
--{{{ void MEMgeTREE ( int src, int len )
void MEMgeTREE ( int src, int len )
{
}
--}}}
--{{{ void MEMgtTREE ( int src, int len )
void MEMgtTREE ( int src, int len )
{
}
--}}}
--{{{ void ENABandeqMEM ( int src )
void ENABandeqMEM ( int src )
{
}
--}}}
--{{{ void ENABandeqMEMBAR ( int src )
void ENABandeqMEMBAR ( int src )
{
}
--}}}
--{{{ void ENABoreqMEM ( int src )
void ENABoreqMEM ( int src )
{
}
--}}}
--{{{ void ENABxoreqMEM ( int src )
void ENABxoreqMEM ( int src )
{
}
--}}}
--{{{ void CRYintoENAB ()
void CRYintoENAB ()
{
}
--}}}
--{{{ void ENABoreqCRY ()
void ENABoreqCRY ()
{
}
--}}}
--}}}
--{{{ INSTRUCTIONS TO STORE THE ENABLE REGISTER
--{{{ void ENABintoMEM ( int dst )
void ENABintoMEM ( int dst )
{
}
--}}}
--{{{ void MEMoreqENAB ( int dst )
void MEMoreqENAB ( int dst )
{
}
--}}}
--{{{ void MEMandeqENAB ( int dst )
void MEMandeqENAB ( int dst )
{
}
--}}}
--{{{ void ENABintoCRY ()
void ENABintoCRY ()
{
}
--}}}
--}}}
--{{{ ARITHMETIC AND LOGICAL INSTRUCTIONS
/* all memory writes are contioned by the enable register */
--{{{ void CLEAR ( int dst, int dlen)
void CLEAR ( int dst, int dlen)
{
}
--}}}
--{{{ void SET ( int dst, int dlen)
void SET ( int dst, int dlen)
{
}
--}}}
--{{{ void CLRCRY ()
void CLRCRY ()
{
}
--}}}
--{{{ void TREEintoMEM ( int dst, int len )
void TREEintoMEM ( int dst, int len )
{
}
--}}}
--{{{ void TREEBARintoMEM ( int dst, int len )
void TREEBARintoMEM ( int dst, int len )
{
}
--}}}
--{{{ void TREEclmpintoMEM ( int dst, int len )
void TREEclmpintoMEM ( int dst, int len )
{
}
--}}}
--{{{ void SCAintoMEM ( int dst, int len )
void SCAintoMEM ( int dst, int len )
{
}
--}}}
--{{{ void CPY ( int dst, int src, int len )
void CPY ( int dst, int src, int len )
{
}
--}}}
--{{{ void SWAP ( int dst, int src, int len )
void SWAP ( int dst, int src, int len )
{
}
--}}}
--{{{ void INC ( int dst, int src, int len )
void INC ( int dst, int src, int len )
{
}
--}}}
--{{{ void DEC ( int dst, int src, int len )
void DEC ( int dst, int src, int len )
{
}
--}}}
--{{{ void SHIFTL ( int dst, int src, int len, int n )
void SHIFTL ( int dst, int src, int len, int n )
{
}
--}}}
--{{{ void SHIFTR ( int dst, int src, int dlen, int slen, int n )
void SHIFTR ( int dst, int src, int dlen, int slen, int n )
{
}
--}}}
--{{{ void INVERT ( int dst, int src, int dlen )
void INVERT ( int dst, int src, int dlen )
{
}
--}}}
--{{{ void NEGATE ( int dst, int src, int dlen )
void NEGATE ( int dst, int src, int dlen )
{
}
--}}}
--{{{ void MEMpluseqSCA ( int dst, int src, int dlen )
void MEMpluseqSCA ( int dst, int src, int dlen )
{
}
--}}}
--{{{ void MEMplusMEM ( int dst, int lsrc, int src, int dlen, int slen )
void MEMplusMEM ( int dst, int lsrc, int src, int dlen, int slen )
{
}
--}}}
--{{{ void MEMpluseqMEM ( int dst, int src, int dlen, int slen )
void MEMpluseqMEM ( int dst, int src, int dlen, int slen )
{
}
--}}}
--{{{ void MEMclmppluseqMEM ( int dst, int src, int dlen, int tmp )
void MEMclmppluseqMEM ( int dst, int src, int dlen, int tmp )
{
}
--}}}
--{{{ void MEMminusMEM ( int dst, int lsrc, int src, int dlen, int slen )
void MEMminusMEM ( int dst, int lsrc, int src, int dlen, int slen )
{
}
--}}}
--{{{ void MEMminuseqMEM ( int dst, int src, int dlen, int slen )
void MEMminuseqMEM ( int dst, int src, int dlen, int slen )
{
}
--}}}
--{{{ void MEMplusMEM2 ( int dst, int lsrc, int src, int dlen, int slen )
void MEMplusMEM2 ( int dst, int lsrc, int src, int dlen, int slen )
{
}
--}}}
--{{{ void MEMpluseqMEM2 ( int dst, int src, int dlen, int slen )
void MEMpluseqMEM2 ( int dst, int src, int dlen, int slen )
{
}
--}}}
--{{{ void MEM2clmppluseqMEM2 ( int dst, int src, int dlen, int tmp )
void MEM2clmppluseqMEM2 ( int dst, int src, int dlen, int tmp )
{
}
--}}}
--{{{ void MEMminusMEM2 ( int dst, int lsrc, int src, int dlen, int slen )
void MEMminusMEM2 ( int dst, int lsrc, int src, int dlen, int slen )
{
}
--}}}
--{{{ void MEMminuseqMEM2 ( int dst, int src, int dlen, int slen )
void MEMminuseqMEM2 ( int dst, int src, int dlen, int slen )
{
}
--}}}
--{{{ void MEMandMEM ( int dst, int lsrc, int src, int dlen )
void MEMandMEM ( int dst, int lsrc, int src, int dlen )
{
}
--}}}
--{{{ void MEMandeqMEM ( int dst, int src, int dlen )
void MEMandeqMEM ( int dst, int src, int dlen )
{
}
--}}}
--{{{ void MEMorMEM ( int dst, int lsrc, int src, int dlen )
void MEMorMEM ( int dst, int lsrc, int src, int dlen )
{
}
--}}}
--{{{ void MEMoreqMEM ( int dst, int src, int dlen )
void MEMoreqMEM ( int dst, int src, int dlen )
{
}
--}}}
--{{{ void MEMxorMEM ( int dst, int lsrc, int src, int dlen )
void MEMxorMEM ( int dst, int lsrc, int src, int dlen )
{
}
--}}}
--{{{ void MEMxoreqMEM ( int dst, int src, int dlen )
void MEMxoreqMEM ( int dst, int src, int dlen )
{
}
--}}}
--{{{ void MEMpluseqTREE ( int dst, int src, int len )
void MEMpluseqTREE ( int dst, int src, int len )
{
}
--}}}
--{{{ void TREEminusMEM ( int dst, int src, int len )
void TREEminusMEM ( int dst, int src, int len )
{
}
--}}}
--{{{ void MEMandTREE ( int dst, int src, int len )
void MEMandTREE ( int dst, int src, int len )
{
}
--}}}
--{{{ void MEMorTREE ( int dst, int src, int len )
void MEMorTREE ( int dst, int src, int len )
{
}
--}}}
--{{{ void MEMxorTREE ( int dst, int src, int len )
void MEMxorTREE ( int dst, int src, int len )
{
}
--}}}
--{{{ void CRYintoMEM ( int dst )
void CRYintoMEM ( int dst )
{
}
--}}}
--}}}
--{{{ SPECIAL INSTRUCTIONS
--{{{ void FTECT ( int dst, int len )
void FTECT ()
{
}
--}}}
--{{{ void FEDGE ()
void FEDGE ()
{
}
--}}}
--{{{ void SEDGE ( int src )
void SEDGE ( int src )
{
}
--}}}
--{{{ void FEDGEBAR ()
void FEDGEBAR ()
{
}
--}}}
--{{{ void SEDGEBAR ( int src )
void SEDGEBAR ( int src )
{
}
--}}}
--{{{ void EDGE2 ()
void EDGE2 ()
{
}
--}}}
--{{{ void STRIPEDGE ( int src, int dst )
void STRIPEDGE ( int src, int dst )
{
}
--}}}
--{{{ void MEMEDGE ( int dst )
void MEMEDGE ( int dst )
{
}
--}}}
--{{{ void FCMEMA ( int src, int len )
void FCMEMA ( int src, int len )
{
}
--}}}
--{{{ void SCMEMA ( int src, int len, int aux )
void SCMEMA ( int src, int len, int aux )
{
}
--}}}
--{{{ void OVFIX ( int dst, int dlen, int tmp )
void OVFIX ( int dst, int dlen, int tmp )
{
}
--}}}
--{{{ void TBLENTRY ( int dst, int src, int dlen, int slen )
void TBLENTRY ( int dst, int src, int dlen, int slen )
{
}
--}}}
--{{{ void SPLAT ( int dst, int len, int tmp )
void SPLAT ( int dst, int len, int tmp )
{
}
--}}}
--}}}
--{{{ INITIALIZATION INSTRUCTIONS - not impl
--}}}
+23
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@@ -0,0 +1,23 @@
#ifdef igctype_h
#else
#define igctype_h
#define tile_x_bits 6
#define tile_x (1<<tile_x_bits)
#define tile_y_bits 7
#define tile_y (1<<tile_y_bits)
#define pxpl5_mem_chars 26
typedef struct s_pxpl5mem {
int enable;
unsigned char memory [pxpl5_mem_chars];
} pixel_memory;
typedef struct s_pxpl5tile {
int x0;
int y0;
pixel_memory *array[tile_x * tile_y];
} pixel_tile;
#endif
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s:\d7314a\tools\icc /pp %1 > %2
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# ###############################################################
#
# Makefile for i860 using Portland Group compilers
# assumes BORLAND make Version 2.0
#
# 4 MByte board version, Benchmarks
#
# Phil Atkin, DIVISION
# 6th jan 92
#
# ###############################################################
#
# board specific constants
#
BANNER=GT860-EL-CF-4
LDADDR=0x83600000
CDADDR=0xfff80000
PAGETABLE=y:\control\gt860el\pgi\lib\crt0_4m.o
#
# compiler optimisation levels
#
COPT_LEVEL=4
FOPT_LEVEL=4
#include "makefile.inc"
!include "makefile.inc"
# Try adding compiler options -O4 -Mvect=recog
execs: hello.860
hello.860: hello.o
pxpl5tst.860: pxpl5tst.o pxpl5sup.o
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@@ -0,0 +1,21 @@
# ##############################################################
#
# makefile for ZORTECH C
#
#
CFLAGS= -f -e -bx -mx -DMS_DOS -DDVIEW -Iw:\zortech\include
OCFLAGS= -f -o -e -bx -mx -DMS_DOS -DDVIEW -Iw:\zortech\include
.c.obj:
ztc $(OCFLAGS) -c $<
.asm.obj:
ztc $(OCFLAGS) -c $<
.c.exe:
ztc $(OCFLAGS) $*.c
pxpl5tst.exe: pxpl5tst.c pxpl5sup.obj pxpl5sup.c
ztc $(OCFLAGS) $*.c pxpl5sup.obj
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# ###############################################################
#
# Makefile for i860 using Portland Group compilers
# assumes BORLAND make Version 2.0
#
# 4 MByte board version, Benchmarks
#
# Phil Atkin, DIVISION
# 6th jan 92
#
# ###############################################################
#
# board specific constants
#
BANNER=GT860-EL-CF-4
LDADDR=0x83600000
CDADDR=0xfff80000
PAGETABLE=c:\pgi\lib\crt0_4m.o
#
# compiler optimisation levels
#
COPT_LEVEL=4
FOPT_LEVEL=4
#
# macros
#
PGI=c:\pgi
INCLUDE=$(PGI)\include
BIN=$(PGI)\bin
CFLAGS=-x 50 -stdinc $(INCLUDE) -astype 1 -def i860 -opt $(COPT_LEVEL)
FFLAGS=-astype 1 -opt $(FOPT_LEVEL)
AFLAGS=-dos
LFLAGS=-dos -e pstart -k -T $(CDADDR) -d $(LDADDR) -t
##
# here are the general rules
#
# the compile / assemble passes for pgftn and pgc have been merged
##
.ss.s:
macro.bat $*.ss $*.s
pxpl5opt.o : header.ss pxpl5asm.ss pxpl5tri.ss footer.ss
copy header.ss+pxpl5asm.ss+pxpl5tri.ss+footer.ss pxpl5opt.ss
macro.bat $*.ss $*.s
$(BIN)\as860 $*.s $(AFLAGS) -o $*.o
.c.o:
$(BIN)\pgc $*.c $(CFLAGS) -asm $*.s
$(BIN)\as860 $(AFLAGS) -o $*.o $*.s
.s.o:
$(BIN)\as860 $*.s $(AFLAGS) -o $*.o
.f.o:
$(BIN)\pgftn $*.f $(FFLAGS) -asm $*.s
$(BIN)\as860 $(AFLAGS) -o $*.o $*.s
.o.860:
$(BIN)\ld860 $(PAGETABLE) -f $*.lnk $(LFLAGS) -o $*.860
opcodes.exe: opcodes.c
ztc -e -bx -mx -DMS_DOS -Iw:\zortech\include $*.c
igc_opcd.h : opcodes.exe ..\..\unc\igc\igc_opcd.h
opcodes ..\..\unc\igc\igc_opcd.h igc_opcd.h
#
# end
#
# Try adding compiler options -O4 -Mvect=recog
pxpl5tst.860: pxpl5tst.o pxpl5opt.o pxpl5sup.o walltime.o
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# ###############################################################
#
# Makefile for i860 using Portland Group DOS 386 cross-compilers
# assumes BORLAND make Version 2.0
#
# rules only, independent of board memory size
#
# Phil Atkin, DIVISION
# 6th jan 92, 19th mar 92
#
# ###############################################################
#
# macros
#
PGI=y:\control\gt860el\pgi
INCLUDE=$(pgi)\include
BIN=$(pgi)\bin
CFLAGS=-x 50 -stdinc $(INCLUDE) -astype 1 -def i860 -opt $(COPT_LEVEL)
FFLAGS=-astype 1 -opt $(FOPT_LEVEL)
AFLAGS=-dos
LFLAGS=-dos -e pstart -k -T $(CDADDR) -d $(LDADDR) -t
##
# here are the general rules
#
# the compile / assemble passes for pgftn and pgc have been merged
##
.c.o:
$(BIN)\pgc $*.c $(CFLAGS) -asm $*.s
$(BIN)\as860 $(AFLAGS) -o $*.o $*.s
.f.o:
$(BIN)\pgftn $*.f $(FFLAGS) -asm $*.s
$(BIN)\as860 $(AFLAGS) -o $*.o $*.s
.o.860:
$(BIN)\ld860 $(PAGETABLE) -f $*.lnk $(LFLAGS) -o $*.860
#
# end
#
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fff88f8
Symbols from pxpl5tst.860:
Name Value Class Type Size Line Section
mt4m.c | | file | | | |
mt4m1.c | | file | | | |
pstart.s | | file | | | |
waskern |0xfff800c8|static| | | |.text
no_intr |0xfff80178|static| | | |.text
got_ttype |0xfff80370|static| | | |.text
no_iat |0xfff8018c|static| | | |.text
no_it |0xfff801d0|static| | | |.text
not_bpt |0xfff801ac|static| | | |.text
not_sysc |0xfff801c4|static| | | |.text
no_ft |0xfff801e4|static| | | |.text
no_tbits |0xfff8036c|static| | | |.text
not_di_mode |0xfff801fc|static| | | |.text
not_ld_st |0xfff802e8|static| | | |.text
ls_ok |0xfff80228|static| | | |.text
got_ls_aln |0xfff80244|static| | | |.text
is_ld |0xfff80288|static| | | |.text
got_datp |0xfff80364|static| | | |.text
gen_ea |0xfff80294|static| | | |.text
gen_r_r |0xfff802c0|static| | | |.text
ai_fix |0xfff802cc|static| | | |.text
no_ai_fix |0xfff802e0|static| | | |.text
fdat_ok |0xfff8030c|static| | | |.text
got_f_aln |0xfff8032c|static| | | |.text
is_pix |0xfff80358|static| | | |.text
is_fld |0xfff8034c|static| | | |.text
new_flush |0xfff80620|static| | | |.text
flp1 |0xfff805b8|static| | | |.text
flp2 |0xfff805e4|static| | | |.text
nflp1 |0xfff80670|static| | | |.text
nflp2 |0xfff806a0|static| | | |.text
twait |0xfff80828|static| | | |.text
trap.c | | file | | | |
.S00159 |0x83607167|static| | | |.data
.S00162 |0x83607172|static| | | |.data
.S00164 |0x83607175|static| | | |.data
.S00166 |0x8360717a|static| | | |.data
.S00168 |0x8360717d|static| | | |.data
.S00170 |0x83607182|static| | | |.data
.S00172 |0x83607185|static| | | |.data
.S00175 |0x8360718c|static| | | |.data
.S00177 |0x8360718f|static| | | |.data
.S00180 |0x83607193|static| | | |.data
.S00182 |0x83607196|static| | | |.data
.S00184 |0x836071a1|static| | | |.data
.S00186 |0x836071a4|static| | | |.data
.S00188 |0x836071ae|static| | | |.data
.S00190 |0x836071b1|static| | | |.data
.S00192 |0x836071c0|static| | | |.data
.S00194 |0x836071c3|static| | | |.data
.S00196 |0x836071d0|static| | | |.data
.S00198 |0x836071d3|static| | | |.data
.S00200 |0x836071de|static| | | |.data
.STACK |0x83611600|static| | | |.bss
.S00093 |0x83607040|static| | | |.data
.S00095 |0x83607054|static| | | |.data
.S00097 |0x8360705f|static| | | |.data
.S00099 |0x83607070|static| | | |.data
.S00101 |0x8360707b|static| | | |.data
.S00103 |0x8360707f|static| | | |.data
.S00105 |0x83607087|static| | | |.data
.S00107 |0x83607096|static| | | |.data
.S00109 |0x8360709a|static| | | |.data
.S00111 |0x836070a7|static| | | |.data
.S00113 |0x836070b2|static| | | |.data
.S00115 |0x836070bd|static| | | |.data
.S00117 |0x836070c6|static| | | |.data
.S00119 |0x836070d1|static| | | |.data
.S00121 |0x836070dd|static| | | |.data
.S00123 |0x836070e8|static| | | |.data
.S00125 |0x836070f4|static| | | |.data
.S00127 |0x836070fe|static| | | |.data
.S00130 |0x8360710b|static| | | |.data
.S00132 |0x83607117|static| | | |.data
.S00134 |0x83607122|static| | | |.data
.S00136 |0x8360712c|static| | | |.data
.S00138 |0x83607132|static| | | |.data
.S00140 |0x8360713d|static| | | |.data
.S00142 |0x8360714f|static| | | |.data
.S00144 |0x83607157|static| | | |.data
io.c | | file | | | |
.BSS |0x83611620|static| | | |.bss
basicio.c | | file | | | |
.S00114 |0x83607260|static| | | |.data
.S00121 |0x83607280|static| | | |.data
.S00123 |0x83607293|static| | | |.data
consio.c | | file | | | |
_rd_o |0x836072c4|static| | | |.data
_wr_o |0x836072c0|static| | | |.data
.BSS |0x83611a40|static| | | |.bss
user.c | | file | | | |
.st107 |0x836072e0|static| | | |.data
cmd_line.c | | file | | | |
sem.s | | file | | | |
spin |0xfff816e4|static| | | |.text
lwait |0xfff8170c|static| | | |.text
lloop |0xfff81728|static| | | |.text
.C00037 |0x83607300|static| | | |.data
bini_start |0x8360731c|static| | | |.data
bini_full |0x83607304|static| | | |.data
bini_endfull |0x83607330|static| | | |.data
bini_notfull |0x8360730e|static| | | |.data
pxpl5tst.c | | file | | | |
.S00263 |0x83607394|static| | | |.data
.C00265 |0x83607360|static| | | |.data
.C00268 |0x83607364|static| | | |.data
.C00270 |0x83607368|static| | | |.data
.C00274 |0x8360736c|static| | | |.data
.C00275 |0x83607370|static| | | |.data
.C00276 |0x83607374|static| | | |.data
.C00277 |0x83607378|static| | | |.data
.C00278 |0x8360737c|static| | | |.data
.C00279 |0x83607380|static| | | |.data
.C00037 |0x83607390|static| | | |.data
.C00331 |0x83607388|static| | | |.data
.S00287 |0x836073a4|static| | | |.data
pxpl5sup.c | | file | | | |
.STACK |0x83611b60|static| | | |.bss
.C00037 |0x83607400|static| | | |.data
.S00238 |0x83607404|static| | | |.data
.S00255 |0x83607424|static| | | |.data
.S00257 |0x83607441|static| | | |.data
.S00262 |0x83607457|static| | | |.data
.S00267 |0x8360746d|static| | | |.data
.S00283 |0x83607481|static| | | |.data
.S00361 |0x836074b7|static| | | |.data
.S00369 |0x836074c6|static| | | |.data
.S00371 |0x836074c8|static| | | |.data
.S00373 |0x836074d5|static| | | |.data
walltime.c | | file | | | |
.C00060 |0x83607500|static| | | |.data
.C00062 |0x83607508|static| | | |.data
_lastTime |0x83607518|static| | | |.data
.C00056 |0x83607510|static| | | |.data
fclose.c | | file | | | |
fflush.c | | file | | | |
fputs.c | | file | | | |
printf.c | | file | | | |
puts.c | | file | | | |
setvbuf.c | | file | | | |
.st135 |0x83607520|static| | | |.data
stdio.c | | file | | | |
vfprintf.c | | file | | | |
_cnv_put |0xfff838a0|static| | | |.text
_cnv_d |0xfff83be8|static| | | |.text
.S00194 |0x8360fcc0|static| | | |.data
.S00200 |0x8360fcc2|static| | | |.data
.S00206 |0x8360fccd|static| | | |.data
.S00212 |0x8360fccf|static| | | |.data
.S00216 |0x8360fcd1|static| | | |.data
_cnv_o |0xfff83da8|static| | | |.text
.S00256 |0x8360fcd2|static| | | |.data
.S00260 |0x8360fcd4|static| | | |.data
_cnv_u |0xfff83f00|static| | | |.text
.S00285 |0x8360fcd5|static| | | |.data
_cnv_x |0xfff84020|static| | | |.text
.S00299 |0x8360fcd6|static| | | |.data
.S00303 |0x8360fce7|static| | | |.data
.S00320 |0x8360fcf8|static| | | |.data
.S00323 |0x8360fcfb|static| | | |.data
.S00328 |0x8360fcfe|static| | | |.data
_cnv_f |0xfff841c8|static| | | |.text
.S00353 |0x8360fcff|static| | | |.data
.S00358 |0x8360fd01|static| | | |.data
.S00363 |0x8360fd03|static| | | |.data
.S00367 |0x8360fd05|static| | | |.data
_cnv_e |0xfff84590|static| | | |.text
.S00437 |0x8360fd06|static| | | |.data
.S00442 |0x8360fd08|static| | | |.data
.S00447 |0x8360fd0a|static| | | |.data
.S00451 |0x8360fd0c|static| | | |.data
_cnv_g |0xfff848e8|static| | | |.text
.st908 |0x8360fd10|static| | | |.data
.S00640 |0x8360fd0d|static| | | |.data
.S00645 |0x8360fd0e|static| | | |.data
pc_dos.c | | file | | | |
abs.c | | file | | | |
atexit.c | | file | | | |
__atexit |0x8360fd60|static| | | |.data
ctype.c | | file | | | |
exit.c | | file | | | |
fpcvt.c | | file | | | |
_ui64toa |0xfff85ee0|static| | | |.text
.S00118 |0x83610920|static| | | |.data
_manshftr |0xfff86100|static| | | |.text
_manshftl |0xfff86208|static| | | |.text
_manadd |0xfff86308|static| | | |.text
_manrnd |0xfff863b8|static| | | |.text
.st174 |0x8361093c|static| | | |.data
_manneg |0xfff864d0|static| | | |.text
.st185 |0x8361094c|static| | | |.data
_manmul |0xfff86528|static| | | |.text
.st201 |0x8361097c|static| | | |.data
.st200 |0x8361095c|static| | | |.data
_ufpnorm |0xfff866e8|static| | | |.text
_ufprnd |0xfff867c8|static| | | |.text
_ufpxten |0xfff86808|static| | | |.text
_ftab1 |0x8361099c|static| | | |.data
_ftab2 |0x83610af8|static| | | |.data
_ufptosci |0xfff86968|static| | | |.text
.S00260 |0x8361092b|static| | | |.data
.S00264 |0x8361092f|static| | | |.data
_ufptodec |0xfff86b38|static| | | |.text
.S00286 |0x83610933|static| | | |.data
.S00290 |0x83610937|static| | | |.data
_dtoufp |0xfff86c20|static| | | |.text
_ufptod |0xfff86ce8|static| | | |.text
_atoxi |0xfff86e98|static| | | |.text
_atoui64 |0xfff87200|static| | | |.text
_atoxufp |0xfff87390|static| | | |.text
.BSS |0x83611ba0|static| | | |.bss
isatty.c | | file | | | |
malloc.c | | file | | | |
_clean_list |0xfff87e20|static| | | |.text
_next |0x83610c44|static| | | |.data
_allar |0xfff87ed8|static| | | |.text
_first |0x83610c40|static| | | |.data
strtol.c | | file | | | |
.C00202 |0x83610c60|static| | | |.data
.C00196 |0x83610c68|static| | | |.data
.C00263 |0x83610c70|static| | | |.data
.C00197 |0x83610c78|static| | | |.data
memchr.c | | file | | | |
memcpy.s | | file | | | |
DU108 |0xfff88b4c|static| | | |.text
memmove.s | | file | | | |
TO_LT_FROM |0xfff88bb0|static| | | |.text
TO_EQ_FROM |0xfff88bb8|static| | | |.text
TO_GT_FROM |0xfff88ba0|static| | | |.text
fwdcopy |0xfff88bf4|static| | | |.text
backcopy |0xfff88bc0|static| | | |.text
DU108 |0xfff88dac|static| | | |.text
memset.s | | file | | | |
strcmp.s | | file | | | |
strlen.c | | file | | | |
__exit.c | | file | | | |
cerror.c | | file | | | |
close.c | | file | | | |
lseek.c | | file | | | |
read.c | | file | | | |
sbrk.c | | file | | | |
_break_val |0x83610ca0|static| | | |.data
times.c | | file | | | |
unlink.c | | file | | | |
write.c | | file | | | |
mangle.c | | file | | | |
Exit.c | | file | | | |
.S00126 |0x83610cc0|static| | | |.data
.S00131 |0x83610cc3|static| | | |.data
FGetBlock.c | | file | | | |
_FgetOneBlock |0xfff899e0|static| | | |.text
.S00130 |0x83610ce0|static| | | |.data
.S00135 |0x83610ce4|static| | | |.data
FPutBlock.c | | file | | | |
_FputOneBlock |0xfff89bc0|static| | | |.text
.S00130 |0x83610d00|static| | | |.data
.S00135 |0x83610d04|static| | | |.data
Fclose.c | | file | | | |
.S00126 |0x83610d20|static| | | |.data
.S00131 |0x83610d23|static| | | |.data
Feof.c | | file | | | |
.S00126 |0x83610d40|static| | | |.data
.S00131 |0x83610d43|static| | | |.data
Fflush.c | | file | | | |
.S00126 |0x83610d60|static| | | |.data
.S00131 |0x83610d63|static| | | |.data
Fseek.c | | file | | | |
.S00128 |0x83610d80|static| | | |.data
.S00133 |0x83610d85|static| | | |.data
Ftell.c | | file | | | |
.S00127 |0x83610da0|static| | | |.data
.S00132 |0x83610da3|static| | | |.data
Remove.c | | file | | | |
.S00126 |0x83610dc0|static| | | |.data
.S00131 |0x83610dc3|static| | | |.data
CmdLine.c | | file | | | |
.S00129 |0x83610de0|static| | | |.data
.S00134 |0x83610de3|static| | | |.data
idserver.c | | file | | | |
_map |0x83610e00|static| | | |.data
packet.c | | file | | | |
uidiv.s | | file | | | |
va_arg.c | | file | | | |
qidiv.s | | file | | | |
end.s | | file | | | |
Trace |0xfff8081c|extern| | | |.text
_CommandLine |0xfff8a400|extern| | | |.text
_DMAscreen |0x836074e8|extern| | | |.data
_Exit |0xfff898e0|extern| | | |.text
_FGetBlock |0xfff89ae8|extern| | | |.text
_FPutBlock |0xfff89cd8|extern| | | |.text
_Fclose |0xfff89dc0|extern| | | |.text
_Feof |0xfff89ec0|extern| | | |.text
_Fflush |0xfff89fc0|extern| | | |.text
_Fseek |0xfff8a0c0|extern| | | |.text
_Ftell |0xfff8a1e0|extern| | | |.text
_InitStack |0x83607014|extern| | | |.data
_LockedRead |0xfff8177c|extern| | | |.text
_Remove |0xfff8a300|extern| | | |.text
_Set |0xfff81754|extern| | | |.text
_Signal |0xfff81738|extern| | | |.text
_TPcommand |0xfff814f0|extern| | | |.text
_Topmem |0x83607010|extern| | | |.data
_Wait |0xfff816e0|extern| | | |.text
__Isalnum |0x8360fe20|extern| | | |.data
__Isalpha |0x8360ff20|extern| | | |.data
__Iscntrl |0x83610020|extern| | | |.data
__Isdigit |0x83610120|extern| | | |.data
__Isgraph |0x83610220|extern| | | |.data
__Islower |0x83610320|extern| | | |.data
__Isprint |0x83610420|extern| | | |.data
__Ispunct |0x83610520|extern| | | |.data
__Isspace |0x83610620|extern| | | |.data
__Isupper |0x83610720|extern| | | |.data
__Isxdigit |0x83610820|extern| | | |.data
___PC_DATA |0x83608b74|extern| | | |.data
___PC_DOS |0x83611dc0|extern| | | |.bss
___allbuf |0xfff83818|extern| | | |.text
___atexit |0xfff85c50|extern| | | |.text
___builtin_va_arg |0xfff8b100|extern| | | |.text
___cleanup |0xfff82d28|extern| | | |.text
___ecvt |0xfff87868|extern| | | |.text
___expand_nl |0xfff858a0|extern| | | |.text
___fcvt |0xfff87af8|extern| | | |.text
___fflush |0xfff82de0|extern| | | |.text
___flsbuf |0xfff82ef8|extern| | | |.text
___flushlbf |0xfff83008|extern| | | |.text
___iobuf |0x83607540|extern| | | |.data
___pc_set_tmp |0xfff85820|extern| | | |.text
___shrink_nl |0xfff859c8|extern| | | |.text
___stdio_dummy |0xfff83880|extern| | | |.text
___strtod |0xfff877f0|extern| | | |.text
__break_cmd_line |0xfff81540|extern| | | |.text
__exit |0xfff88fc0|extern| | | |.text
__start_buffered_io |0xfff80ae0|extern| | | |.text
_abs |0xfff85bc0|extern| | | |.text
_atexit |0xfff85be0|extern| | | |.text
_atof |0xfff87798|extern| | | |.text
_bad |0x83605000|extern| | | |.data
_bank0_pte |0x83603000|extern| | | |.data
_bank1_pte |0x83604000|extern| | | |.data
_bin_full |0xfff81b4c|extern| | | |.text
_bin_not_full |0xfff81c10|extern| | | |.text
_binitize |0xfff826c0|extern| | | |.text
_binitize_fn |0xfff81aa0|extern| | | |.text
_break_packet |0xfff8aac8|extern| | | |.text
_brk |0xfff89260|extern| | | |.text
_buffer_char |0xfff81160|extern| | | |.text
_buffer_string |0xfff810f0|extern| | | |.text
_build_packet |0xfff8a620|extern| | | |.text
_bump_x |0xfff81c54|extern| | | |.text
_bump_y |0xfff81c64|extern| | | |.text
_calloc |0xfff88130|extern| | | |.text
_checkx3 |0xfff817dc|extern| | | |.text
_checky3 |0xfff8181c|extern| | | |.text
_clearIserverId |0xfff8a5d0|extern| | | |.text
_close |0xfff89000|extern| | | |.text
_cn_getc |0xfff80fe8|extern| | | |.text
_cn_nulls |0x836072cc|extern| | | |.data
_cn_putc |0xfff80de0|extern| | | |.text
_cngetc |0xfff80fa8|extern| | | |.text
_cnpollc |0xfff810e8|extern| | | |.text
_cnputc |0xfff80d40|extern| | | |.text
_cnputs |0xfff81370|extern| | | |.text
_cnread |0xfff81060|extern| | | |.text
_cnwrite |0xfff80e58|extern| | | |.text
_command_no |0x8360700c|extern| | | |.data
_cons_simul |0x836072c8|extern| | | |.data
_create_screenbins |0xfff823e8|extern| | | |.text
_det_name |0x8360722c|extern| | | |.data
_dump_reg |0xfff80840|extern| | | |.text
_ecvt |0xfff87848|extern| | | |.text
_edata |0x83611600|extern| | | |(ABS)
_edgeize |0xfff82100|extern| | | |.text
_edgize_quad_fn |0xfff81928|extern| | | |.text
_edgize_tri_fn |0xfff818a0|extern| | | |.text
_end |0x83612700|extern| | | |(ABS)
_endminimax |0xfff81844|extern| | | |.text
_endminimaxdb |0xfff81848|extern| | | |.text
_errno |0x83610c80|extern| | | |.data
_etext |0xfff8b300|extern| | | |(ABS)
_exit |0xfff85ea0|extern| | | |.text
_fclose |0xfff82bc0|extern| | | |.text
_fcvt |0xfff87ad8|extern| | | |.text
_fflush |0xfff83080|extern| | | |.text
_fixes |0xfff80a08|extern| | | |.text
_flush |0xfff80560|extern| | | |.text
_flush1 |0xfff804fc|extern| | | |.text
_flush_inv |0xfff807a8|extern| | | |.text
_fprintf |0xfff832a8|extern| | | |.text
_fputs |0xfff83100|extern| | | |.text
_free |0xfff88188|extern| | | |.text
_free_binchunks |0x836074d8|extern| | | |.data
_fx1gtfx2 |0xfff817d4|extern| | | |.text
_fx2gtfx1 |0xfff817c8|extern| | | |.text
_fx3max |0xfff817fc|extern| | | |.text
_fx3min |0xfff817f0|extern| | | |.text
_fy1gtfy2 |0xfff81814|extern| | | |.text
_fy2gtfy1 |0xfff81808|extern| | | |.text
_fy3max |0xfff81840|extern| | | |.text
_fy3min |0xfff81834|extern| | | |.text
_gen_ack |0xfff80d70|extern| | | |.text
_getIserverId |0xfff8a598|extern| | | |.text
_get_dirbase |0xfff806bc|extern| | | |.text
_get_fp |0xfff806d4|extern| | | |.text
_get_psr |0xfff806c8|extern| | | |.text
_go_virt |0xfff80748|extern| | | |.text
_grab_binchunks |0xfff822f0|extern| | | |.text
_ienable |0xfff80808|extern| | | |.text
_input_ccb |0x83607004|extern| | | |.data
_insertIserverId |0xfff8a520|extern| | | |.text
_intrs |0x836072b8|extern| | | |.data
_inv_tlb_ic |0xfff807c0|extern| | | |.text
_ioc |0x83607000|extern| | | |.data
_iopte |0x83602000|extern| | | |.data
_isalnum |0xfff85d00|extern| | | |.text
_isalpha |0xfff85d20|extern| | | |.text
_isatty |0xfff87de0|extern| | | |.text
_iscntrl |0xfff85d40|extern| | | |.text
_isdigit |0xfff85d60|extern| | | |.text
_isgraph |0xfff85d80|extern| | | |.text
_islower |0xfff85da0|extern| | | |.text
_isprint |0xfff85dc0|extern| | | |.text
_ispunct |0xfff85de0|extern| | | |.text
_isspace |0xfff85e00|extern| | | |.text
_isupper |0xfff85e20|extern| | | |.text
_isxdigit |0xfff85e40|extern| | | |.text
_jmptab |0x83611dd0|extern| | | |.bss
_kpde |0x83600000|extern| | | |.data
_liberate_screenbins|0xfff825a8|extern| | | |.text
_lseek |0xfff890c0|extern| | | |.text
_main |0xfff81f40|extern| | | |.text
_make_outblock |0xfff814b8|extern| | | |.text
_malloc |0xfff87f38|extern| | | |.text
_mangle |0xfff895c0|extern| | | |.text
_mathreq |0xfff81480|extern| | | |.text
_mem_file_closed |0xfff897d8|extern| | | |.text
_mem_file_open |0xfff897a8|extern| | | |.text
_mem_file_unlink |0xfff89850|extern| | | |.text
_memchr |0xfff88880|extern| | | |.text
_memcpy |0xfff88980|extern| | | |.text
_memedFile |0x83611ed0|extern| | | |.bss
_memmove |0xfff88b80|extern| | | |.text
_memset |0xfff88de0|extern| | | |.text
_minimaxy |0xfff81800|extern| | | |.text
_minimaxydb |0xfff81804|extern| | | |.text
_mth_i_qidiv |0xfff8b220|extern| | | |.text
_mth_i_uidiv |0xfff8b020|extern| | | |.text
_new_dirbase |0xfff806e0|extern| | | |.text
_next_binchunk |0xfff82390|extern| | | |.text
_nputs |0xfff811b0|extern| | | |.text
_nputx |0xfff81200|extern| | | |.text
_output_ccb |0x83607008|extern| | | |.data
_periph_pte |0x83601000|extern| | | |.data
_planarize |0xfff821e8|extern| | | |.text
_planarize_fn |0xfff819e0|extern| | | |.text
_planarize_puff_fn |0xfff81948|extern| | | |.text
_preplanarize |0xfff82150|extern| | | |.text
_preplanarize_fn |0xfff817a0|extern| | | |.text
_printf |0xfff831e0|extern| | | |.text
_puts |0xfff83580|extern| | | |.text
_putx |0xfff81288|extern| | | |.text
_read |0xfff891c0|extern| | | |.text
_realloc |0xfff88208|extern| | | |.text
_reg_dump |0xfff81e38|extern| | | |.text
_safe_binitize |0xfff82890|extern| | | |.text
_safe_binitize_fn |0xfff81aa8|extern| | | |.text
_sbrk |0xfff892e8|extern| | | |.text
_sbss |0x83611600|extern| | | |.data
_screen0bins |0x836074dc|extern| | | |.data
_screen1bins |0x836074e0|extern| | | |.data
_screenbins |0x836074e4|extern| | | |.data
_sdata |0x83600000|extern| | | |.data
_second_ |0xfff82b20|extern| | | |.text
_serve_io_int |0xfff80b80|extern| | | |.text
_setbuf |0xfff837d0|extern| | | |.text
_setvbuf |0xfff83640|extern| | | |.text
_sprintf |0xfff833b8|extern| | | |.text
_start |0xfff80000|extern| | | |.text
_stext |0xfff80000|extern| | | |.text
_strcmp |0xfff88f00|extern| | | |.text
_strcpy |0xfff81488|extern| | | |.text
_strlen |0xfff88f80|extern| | | |.text
_strtod |0xfff877d0|extern| | | |.text
_strtol |0xfff883a0|extern| | | |.text
_take_inblock |0xfff814b0|extern| | | |.text
_times |0xfff893a0|extern| | | |.text
_tolower |0xfff85e60|extern| | | |.text
_toupper |0xfff85e80|extern| | | |.text
_trace_regs |0xfff82a58|extern| | | |.text
_trap |0xfff80860|extern| | | |.text
_trap_type |0x836071e4|extern| | | |.data
_tri_zb_d_s |0xfff81c78|extern| | | |.text
_tri_zb_d_s_tex |0xfff81d40|extern| | | |.text
_tri_zb_d_s_texm |0xfff81e30|extern| | | |.text
_unlink |0xfff894a0|extern| | | |.text
_vfprintf |0xfff84ac8|extern| | | |.text
_vprintf |0xfff83358|extern| | | |.text
_vsprintf |0xfff834c0|extern| | | |.text
_vstart |0xfff8047c|extern| | | |.text
_write |0xfff89520|extern| | | |.text
_writeScreen |0x836074ec|extern| | | |.data
_x_loop |0xfff81b38|extern| | | |.text
_x_loopdb |0xfff81b3c|extern| | | |.text
_xbuff |0x836126d0|extern| | | |.bss
_y_loop |0xfff81b2c|extern| | | |.text
_y_loopdb |0xfff81b30|extern| | | |.text
_zbuffer_fn |0xfff81930|extern| | | |.text
_zzzedata |0x83611600|extern| | | |.data
_zzzend |0x836126e4|extern| | | |.bss
_zzzetext |0xfff8b300|extern| | | |.text
alltraps |0xfff800a0|extern| | | |.text
db_special |0x83607024|extern| | | |.data
flush_how |0x83607020|extern| | | |.data
pstart |0xfff80000|extern| | | |.text
ret_user |0xfff803a0|extern| | | |.text
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--{{{ registers
// void safe_binitize ( int macro_lo, int macro_hi,
// float fminx, float fminy,
// float fmaxx, float fmaxy,
// int screen_bins_x )
//
//
// draw an unclipped pmesh....
//
// void draw_geom ( int *icoeff_pp,
// int *icoeff_basep,
// dpl_CONNECTION *connection,
// int draw_mode,
// int backwards,
// int opacity,
// float material )
#define iparam1 r16
#define iparam2 r17
#define iparam3 r18
#define iparam4 r19
#define iparam5 r20
#define iparam6 r21
#define rcoeff_pp r4
#define rcoeff_basep r5
#define connection r6
#define draw_mode r7
#define backwards r8
#define rcoeffptr r9
#define rcoeffbase r10
#define tri_coeffbase r11
#define rv1 r12
#define rv2 r13
#define rv3 r14
#define vert0_ref r15
#define vertex_ref r19
#define pvertex_ref r20
#define n_verts r21
#define opacity r22
#define egde_opcode backwards
#define itemp1 r25
#define itemp2 r26
#define itemp3 r27
#define itemp4 r29
#define itemp5 r30
//
// screen-space minimax for binitizing
//
#define fparam1 f8
#define fparam2 f9
#define fparam3 f10
#define fparam4 f11
#define fminx f8
#define fminy f9
#define fmaxx f10
#define fmaxy f11
#define ftexscale f2
#define fmaterial f3
// x, y coords for tris/quads
#define fx0 f4
#define fy0 f5
#define fx1 f6
#define fy1 f7
#define fx2 f12
#define fy2 f13
#define fdx1 f14
#define fdy1 f15
#define fdx2 f16
#define fdy2 f17
#define fr0 f18
#define fg0 f19
#define fb0 f20
#define fminz f21
#define fr1 f22
#define fg1 f23
#define fb1 f24
#define fC f25
#define fr2 f26
#define fg2 f27
#define fb2 f28
#define fA f29
#define fB f30
#define ftmp f31
--}}}
--{{{ declare offsets in VERTEX structure
//
// Note new placement of next field - ensures double-alignment of
// position, normal and texcoords
//
// typedef struct s_rvert {
// 0 dpl_POINT position;
// 16 dpl_POINT normcol;
// 32 float32 texcoords [3];
// 44 struct s_rvert *next;
// 48 dpl_POINT xform_posn;
// 64 float32 rendered_color[3];
// int32 touched;
// 80 } dpl_REMOTE_VERTEX;
//
// typedef struct s_conn {
// 0 struct s_conn *next;
// 4 int32 n_verts;
// 8 dpl_REMOTE_VERTEX* indices[6];
// 32 dpl_POINT planeEqn;
// 48 float32 rendered_color[3];
// 60 int32 touched;
// } dpl_REMOTE_CONNECTION;
#define VERT_position_offs 48
#define VERT_normal_offs 64
#define VERT_tex_offs 32
#define VERT_size 80
#define VERT_x_offs ((VERT_position_offs) + 0)
#define VERT_y_offs ((VERT_position_offs) + 4)
#define VERT_z_offs ((VERT_position_offs) + 8)
#define VERT_w_offs ((VERT_position_offs) + 12)
#define VERT_r_offs (VERT_normal_offs)
#define VERT_g_offs ((VERT_normal_offs)+4)
#define VERT_b_offs ((VERT_normal_offs)+8)
#define VERT_tex_u_offs ((VERT_tex_offs)+0)
#define VERT_tex_v_offs ((VERT_tex_offs)+4)
#define VERT_a_offs ((VERT_tex_offs)+8)
#define FACET_next_offs 0
#define FACET_nverts_offs 4
#define FACET_vert0_offs 8
#define FACET_plane_offs 32
#define FACET_r_offs 48
#define FACET_g_offs (48+4)
#define FACET_b_offs (48+8)
#define FACET_touched_offs 60
--}}}
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//
//
// project: blaster
// subsystem: ttm100 860_rpc_kernel
//
// module: rpc_kernel
// file: pstart.s
//
// author: chrg
// date: 10:02:90
//
// copyright (c) division ltd. 1990
// sccs ident %w% %g%
//
//
// modified:
//
//
//
//
//
// function:- main entry point to rpc kernel. disables interrupts and
// then calls _vstart to go virtual etc.
//
//
//
//
.file "pstart.s"
.globl _start
.globl pstart
.globl _vstart
psr_im = 0x10
low_pg = 0x0fff
db_ate = 0x20
.text
// at this point, we are running on the bootloaders stack.
pstart:
_start:
// turn off all interrupts
ld.c psr,r16
andnot psr_im,r16,r16
st.c r16,psr
// ensure ate disabled and iti set
ld.c dirbase,r16
or db_ate,r0,r16
st.c r16,dirbase
// ensure fte clear
ld.c fsr,r16
or 0,r0,r16
st.c r16,fsr
// initialise fir
ld.c fir,r0
// setup boot stack
orh 0x8380, r0, r15
or 0x01, r0, r14
st.l r14, 0(r15)
mov 0xffffff00, r18
or 0x04, r0, r19
st.l r19, 0(r18)
// call _flush
// nop
mov 0xffffff00, r18
or 0xb, r0, r19
st.l r19, 24(r18)
// grab initstack and topmem from ccb
orh ha%_input_ccb, r0, r31
ld.l l%_input_ccb(r31), r29
orh 0xf040, r0, r16 // set stack to 0xf0400000
mov r16, sp
// grab the trap vector
orh 0xffff,r0,r20
or 0xff00,r20,r20 //hard vector
// orh h%alltraps,r0,r21
// or l%alltraps,r21,r21 //vector in .text
// subu r21,r20,r22 //rel addr
// shr 2,r22,r22
// adds -3,r22,r22 // adust for 2 NOPS, +1
// // change if remove NOPS!!!!
// andnoth 0xfc00,r22,r22
// orh 0x6800,r22,r22 // br alltraps
or h%alltraps, r0, r19
orh 0xec01, r19, r19
or l%alltraps, r0, r21
orh 0xe421, r21, r21
orh 0x4000, r0, r22
or 0x0800, r22, r22
orh 0xa000,r0,r23 // nop
st.l r23,0(r20) // chip bug NOP
st.l r23,4(r20) // chip bug NOP
st.l r19,8(r20) // br alltraps
st.l r21,12(r20) // delayed NOP
st.l r22,16(r20) // delayed NOP
st.l r23,20(r20) // delayed NOP
st.l r23,24(r20) // delayed NOP
st.l r23,28(r20) // delayed NOP
mov 0xfffff000, r18
or 0x32, r0, r19
st.l r19,0(r18)
br _vstart
nop
// *END* /
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#ifndef divpxmap_h
#define divpxmap_h
#if 0
W A R N I N G
DONT USE C-comments - this is included by assembly code!
hence the horrible if 0s
pixel map allocation for pazpl5
#endif
#if 0
The pixel map has 2 distinct regions, scan-conversion variables and
shading variables. The scan-conversion variables are written during
polygon processing. At end-of-frame time some computation is performed,
and what data is left is shifted into the shading variables.
It is important to try to put all 'scalar' information together, so it
can be sent to pxpl5 in a single operation. The material entry should
contain a (up to ) 32-bit word of scalar information written in a single
operation
Note that an unpleasant side-effect of the pipelining of texture lookup
with scan-conversion is that we have to duplicate some information, such
as r,g,b, specularity, sub-texel coordinates etc. Its the price you pay.
NBB we use the z-buffer to perform texture division; this compromises accuracy
as we only have 20 bits of intermediate precision. In order to buy back 2 more
bits of precision (to make wrapping of textures not eat up precious bits) we
actually use 24 bits for the divide. This means that we H A V E to copy
the 4 bits above the z-buffer into the (now vacant) end-of-frame area, and
then after the divide copy them back.
#endif
#if 0
i/o area, defined by hardware
#endif
#define dvpx_io 0
#if 0
start of scan-conversion variables
#endif
#define dvpx_iobits 32
#define dvpx_texz 32
#define dvpx_texzbits 19
#define dvpx_opaque_50 51
#define dvpx_opaque_25 52
#define dvpx_opaque_12 53
#define dvpx_texu 54
#define dvpx_texubits 19
#define dvpx_texv 73
#define dvpx_texvbits 19
#define dvpx_zbuf 92
#define dvpx_zbufbits 20
#define dvpx_scalar 112
#define dvpx_pixcolourtype 112
#define dvpx_texsize 113
#define dvpx_texsizebits 3
#define dvpx_texid 116
#define dvpx_texidbits 6
#define dvpx_texrampsel 122
#define dvpx_texrampselbits 2
#define dvpx_intrinsic 124
#define dvpx_intrinsicbits 12
#define dvpx_scalarbits (dvpx_diffuse-dvpx_scalar)
#define dvpx_diffuse 136
#define dvpx_diffusebits 8
#define dvpx_r24 124
#define dvpx_g24 132
#define dvpx_b24 140
#define dvpx_enblpush 152
#if 0
end of scan-conversion variables
start of end-of-frame variables
#endif
#define dvpx_eofstart 154
#define dvpx_eoffog 154
#define dvpx_eoffogbits 8
#define dvpx_eofsubu 162
#define dvpx_eofsububits 5
#define dvpx_eofsubv 167
#define dvpx_eofsubvbits 5
#define dvpx_eofr 172
#define dvpx_eofrbits 8
#define dvpx_eofg 180
#define dvpx_eofgbits 8
#define dvpx_eofb 188
#define dvpx_eofbbits 8
#define dvpx_eoftexramp 196
#define dvpx_eoftexrampbits 2
#define dvpx_eofspec 198
#define dvpx_eofspecbits 8
#define dvpx_eofpixtype 206
#define dvpx_eofpixtypebits 2
#else
#endif
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#ifndef pxpl5asm_h
#define pxpl5asm_h
/* */
/* these are the function prototypes of the i860 assembler sources */
/* */
extern float *preplanarize_fn ( float *coeffs, int unused, float *v1, float *v2, float *v3, float *v4 );
extern float *edgize_tri_fn ( void );
extern float *edgize_tri_fn_p ( void );
extern float *edgize_quad_fn ( void );
extern float *zbuffer_fn ( void );
extern float *planarize_fn ( int pp5_opcode, int index );
extern float *binitize_fn ( int macro_lo, int macro_hi,
int scrmaxx, int scrmaxy, int scrbinsx );
extern float *safe_binitize_fn ( int macro_lo, int macro_hi, int scrbinsx );
#endif
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#ifndef pxpl5tri_h
#define pxpl5tri_h
/*
SIGGRAPH restrictions - only the following are supported
//
// _tri_zb_rgb
// _tri_zb_d_s
// _tri_zb_f
// _tri_zb_rgb_t
// _tri_zb_f_t
// _tri_zb_d_s_t
//
*/
#include "..\dpltypes.h"
/*
typedef float* (*vpx_geometry_function)(float*,float,int,dpl_CONNECTION*,int );
its easier to read the source if i just make the pointers ints! i apologize
to any members of the cleanliness police
*/
typedef int (*vpx_geometry_function)(int,float,int,dpl_CONNECTION*,int );
typedef void (*vpx_totalgeom_function)( int**,float,int,dpl_CONNECTION*,int,int );
extern float *tri_zb_f ( int**,float,int,dpl_CONNECTION*,int,int );
extern float *tri_zb_rgb ( int**,float,int,dpl_CONNECTION*,int,int );
extern float *tri_zb_f_t ( int**,float,int,dpl_CONNECTION*,int,int );
extern float *tri_zb_rgb_t ( int**,float,int,dpl_CONNECTION*,int,int );
extern float *tri_zb_rgb_o_t ( int**,float,int,dpl_CONNECTION*,int,int );
#endif
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#ifndef pxpl5sup_h
#define pxpl5sup_h
#include "pxpl5typ.h"
extern int *newBytes ( int bytes );
extern void edgeize ( float *eqn, float *p1, float *p2 );
extern void preplanarize ( preplane *p, float *v1, float *v2, float *v3 );
extern void planarize ( float *eqn, float *v1, float *v2, float *v3, int index, preplane *p );
extern void create_screenbins ( int screenx, int screeny, int hires );
extern void liberate_screenbins ( screenbin *bins, int screenx, int screeny );
extern binchunk *next_binchunk (void);
extern coeffchunk *next_coeffchunk (void);
extern void binitize ( int macro_lo, int macro_hi,
float fminx, float fminy,
float fmaxx, float fmaxy,
int screen_maxx, int screen_maxy,
int screen_bins_x );
extern void safe_binitize ( int macro_lo, int macro_hi,
float fminx, float fminy,
float fmaxx, float fmaxy,
int screen_bins_x );
extern void dump_bins ( screenbin *bins, int bins_x, int bins_y, int dump_coeffs );
extern binchunk *free_binchunks;
extern screenbin *screen0bins, *screen1bins,
*screenr0bins, *screenr1bins,
*screenbins, *screenrbins;
extern screenbin *trans_screen0bins, *trans_screen1bins,
*trans_screenr0bins, *trans_screenr1bins,
*trans_screenbins, *trans_screenrbins;
extern int DMAscreen,
writeScreen;
extern coeffchunk *coeffstore0,
*coeffstore1,
*last_coeffchunk0,
*last_coeffchunk1,
*last_coeffchunk;
extern float *coefficient_ptr;
extern float *lastcoeffptr;
#endif
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/*
This code relies on the hand-assembly coded edgize, preplanarize,
planarize and binitize functions.
Preplanarize is called first - this caches the edgizing and planarizing
repeated expressions into registers, and computes screen-space minimax
x and y coordinates -
rminx
rminy
rmaxx
rmaxy
rx23 \
rx31 > the recurring differences
rx12 /
rC the divisor for preplanarizing
rv1y
rv2y
rv3y
rv4y for quads
rv1x
rv2x
rv3x
and rv4x for quads
Total 16 fp regs
To ease planarizing and z-buffering, we will keep vertex pointers in
registers throughout -
rv1
rv2
rv3
rv4
Total 4 int regs
A subsequent call to edgeize_triangle edgizes the three edges
correctly, in order, and will guarantee no DDA cracks. A similar edgize_quad
needs implementing (so I need to reserve rvx4 and rvy4)
After edgizing we proceed to planarize - this is done by chained calls to
planarize_fn, passing in 3 fp registers which hold the v1 v2 v3 values to
be planarized, and a pointer register to where A B C should be stored.
Then binitize_fn is called, which uses the pre-computed minimax values to
drop the macro value, coefficient start address and coefficient count into
screen-bins.
So, in general, a triangle drawing function will call
preplanarize_fn ( float *coeffs, VERTEX *a, VERTEX *b, VERTEX *c, VERTEX *d )
edgize_tri_fn ( void )
zbuffer_fn ( void )
planarize_fn ( int opcode, ) many times
binitize_fn () to close
*/
#include <stdio.h>
#include <stdlib.h>
#include "pxpl5asm.h"
float *tri_zb_d_s ( float *coeffs, float *v1, float *v2, float *v3 )
{
/* z-buffered, diffuse-lit, specular lit triangle */
float *t=coeffs;
preplanarize_fn ( coeffs, 0, v1, v2, v3, NULL );
edgize_tri_fn ();
zbuffer_fn ();
planarize_fn ( 0x666, 3 );
planarize_fn ( 0x666, 4 );
return safe_binitize_fn ( 0x666, 4, 10 );
}
float *tri_zb_d_s_tex ( float *coeffs, float *v1, float *v2, float *v3 )
{
/* z-buffered, diffuse-lit, specular lit, textured triangle */
float *t=coeffs;
preplanarize_fn ( coeffs, 0, v1, v2, v3, NULL );
edgize_tri_fn ();
zbuffer_fn ();
planarize_fn ( 0x666, 3 ); /* diff */
planarize_fn ( 0x666, 4 ); /* spec */
planarize_fn ( 0x666, 5 ); /* u */
planarize_fn ( 0x666, 6 ); /* v */
planarize_fn ( 0x666, 7 ); /* homo */
return safe_binitize_fn ( 0x666, 4, 10 );
}
float *tri_zb_d_s_texm ( float *coeffs, float *v1, float *v2, float *v3 )
{
/* z-buffered, diffuse-lit, specular lit, textured, mipped triangle */
return NULL;
}
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#ifndef pxpl5tri_h
#define pxpl5tri_h
/*
SIGGRAPH restrictions - only the following are supported
//
// _tri_zb_rgb
// _tri_zb_d_s
// _tri_zb_f
// _tri_zb_rgb_t
// _tri_zb_f_t
// _tri_zb_d_s_t
//
*/
#include "..\dpltypes.h"
/*
typedef float* (*vpx_geometry_function)(float*,float,int,dpl_CONNECTION*,int );
its easier to read the source if i just make the pointers ints! i apologize
to any members of the cleanliness police
*/
typedef int (*vpx_geometry_function)(int,float,int,dpl_CONNECTION*,int );
typedef void (*vpx_totalgeom_function)(int**,float,int,dpl_CONNECTION*,int,int );
extern float *tri_zb_f ( float *coeffs, float material, int opcode1, dpl_CONNECTION *poly, int backwards );
extern float *tri_zb_rgb ( float *coeffs, float material, int opcode1, dpl_CONNECTION *poly, int backwards );
extern float *tri_zb_f_t ( float *coeffs, float material, int opcode1, dpl_CONNECTION *poly, int backwards );
extern float *tri_zb_rgb_t ( float *coeffs, float material, int opcode1, dpl_CONNECTION *poly, int backwards );
extern float *tri_zb_rgb_o_t ( float *coeffs, float material, int opcode1, dpl_CONNECTION *poly, int backwards );
#endif
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.file "pxpl5tri.c"
// PGC Rel 2.0a -opt 2
.text
.globl _tri_zb_d_s
.align 8
_tri_zb_d_s:
.a1 = 80
.f1 = 32
addu -(.a1+.f1), sp, sp
st.l fp,(.f1-16)(sp)
addu (.f1-16), sp, fp
st.l r1, 4(fp)
st.l r17, 52(fp)
st.l r18, 56(fp)
st.l r19, 60(fp)
// lineno: 66
ld.l 52(fp), r18
mov r0, r17
ld.l 56(fp), r19
ld.l 60(fp), r20
call _preplanarize_fn
mov r0, r21
call _edgize_tri_fn
nop
call _zbuffer_fn
nop
adds 1638, r0, r16
call _planarize_fn
adds 3, r0, r17
adds 1638, r0, r16
call _planarize_fn
adds 4, r0, r17
adds 1638, r0, r16
adds 4, r0, r17
call _safe_binitize_fn
adds 10, r0, r18
// lineno: 77
adds .a1+16, fp, r31
ld.l 4(fp), r1
ld.l 0(fp), fp
bri r1
mov r31, sp
.globl _tri_zb_d_s_tex
.align 8
_tri_zb_d_s_tex:
.a2 = 80
.f2 = 32
addu -(.a2+.f2), sp, sp
st.l fp,(.f2-16)(sp)
addu (.f2-16), sp, fp
st.l r1, 4(fp)
st.l r17, 52(fp)
st.l r18, 56(fp)
st.l r19, 60(fp)
// lineno: 82
ld.l 52(fp), r18
mov r0, r17
ld.l 56(fp), r19
ld.l 60(fp), r20
call _preplanarize_fn
mov r0, r21
call _edgize_tri_fn
nop
call _zbuffer_fn
nop
adds 1638, r0, r16
call _planarize_fn
adds 3, r0, r17
adds 1638, r0, r16
call _planarize_fn
adds 4, r0, r17
adds 1638, r0, r16
call _planarize_fn
adds 5, r0, r17
adds 1638, r0, r16
call _planarize_fn
adds 6, r0, r17
adds 1638, r0, r16
call _planarize_fn
adds 7, r0, r17
adds 1638, r0, r16
adds 4, r0, r17
call _safe_binitize_fn
adds 10, r0, r18
// lineno: 96
adds .a2+16, fp, r31
ld.l 4(fp), r1
ld.l 0(fp), fp
bri r1
mov r31, sp
.globl _tri_zb_d_s_texm
.align 8
_tri_zb_d_s_texm:
// lineno: 101
bri r1
mov r0, r16
// lineno: 102
bri r1
nop
.extern _safe_binitize_fn
.extern _planarize_fn
.extern _zbuffer_fn
.extern _edgize_tri_fn
.extern _preplanarize_fn
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#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <time.h>
#include "..\..\unc\igc\igc_opcd.h"
#include "divpxmap.h"
/*{{{ includes*/
#include "DMAengn.h"
#include "pxpl5sup.h"
#include "pxpl5tri.h"
/*}}} */
/*{{{ extern fns*/
extern float second_(void);
extern void binitize_8(void);
extern void preplane_4( float *, void *, float *, float *, float *, float *);
extern void tex_fixz ( float *z1, float *z2, float *z3 );
extern float tex_scalefac ( float z1, float z2, float z3 );
extern int getFsr (void);
extern void setFsr(int fsr );
/*}}} */
/*{{{ typedefs for new PMESH types*/
typedef struct s_vert {
float position [4];
float xformpos [4];
float texcoords[2];
float normal [3];
float colour [3];
} MESH_VERTEX;
/*}}} */
/*{{{ static void set_vertex ( int index,*/
static void set_vertex ( int index,
MESH_VERTEX *vertices,
float x, float y, float z,
float diff, float spec, float u, float v )
{
vertices[index].position[0]=x;
vertices[index].position[1]=y;
vertices[index].position[2]=z;
vertices[index].xformpos[0]=x;
vertices[index].xformpos[1]=y;
vertices[index].xformpos[2]=z;
vertices[index].xformpos[3]=1.0;
vertices[index].texcoords[0]=u;
vertices[index].texcoords[1]=v;
vertices[index].colour[0]=diff;
vertices[index].colour[1]=spec;
}
/*}}} */
int main(int argc, char **argv )
{
/*{{{ declare locals*/
int i, j, benny=0, truncy[4];
float then, now, a, b, c;
preplane prep;
MESH_VERTEX *vertices, *vert0, *vert1, *vert2, *vert3, *vert4, *vert5;
float *eqn;
int *ieqn;
float materials[4];
/*}}} */
/*{{{ disable floating-point traps*/
setFsr ( 1 | getFsr ());
/*}}} */
/*{{{ allocate and initialize memory*/
eqn=(float *) malloc(1024*sizeof(float));
ieqn=(int *) eqn;
vertices=(MESH_VERTEX *) malloc ( 128 * sizeof(MESH_VERTEX));
printf ("pxpl5tst is go\n" );
set_vertex ( 45, vertices, 32.0f, 32.0f, 122.0f,
1.4f, 1.31f, 0.0f, 1.0f );
set_vertex ( 63, vertices, 42.0f, 22.0f, 38.0f,
2.1f, -2.04f, 1.0f, 1.0f );
set_vertex ( 123, vertices, 12.0f, 62.0f, 822.0f,
3.43f, 1.53f, 0.0f, 0.0f );
set_vertex ( 15, vertices, 132.0f, 132.0f, 622.0f,
1.4f, 3.31f, 0.0f, 0.0f );
set_vertex ( 23, vertices, 142.0f, 150.0f, 138.0f,
2.1f, 1.04f, 0.0f, 1.0f );
set_vertex ( 81, vertices, 152.0f, 162.0f, 222.0f,
3.43f, -1.53f, 1.0f, 1.0f );
vert0=&vertices[ 45];
vert1=&vertices[ 63];
vert2=&vertices[123];
vert3=&vertices[ 15];
vert4=&vertices[ 23];
vert5=&vertices[ 81];
printf ("vertices 0x%x vert0 0x%x vert1 0x%x vert2 0x%x\n",
(int) vertices, (int) vert0, (int) vert1, (int) vert2 );
grab_binchunks ( 400 );
create_screenbins ( 1024, 512 );
for (i=0; i<256; i++) eqn[i]=0.0f;
materials[0]=1.0;
materials[1]=1.0;
materials[2]=1.0;
materials[3]=1.0;
/*}}} */
/*{{{ printf some pxpl5 instructions in hex*/
{
int a, b, c, d, e, f, g, h, i, j, k;
a = Ix_SETENABS();
b = Ix_CLRENABS();
c = Ix_TREEltZERO_L3();
d = Ix_TREEgeZERO_L3();
e = Ix_MEMltTREE_L3(dvpx_zbuf,dvpx_zbufbits);
f = Ix_TREEintoMEM_L0(dvpx_zbuf,dvpx_zbufbits);
g = Ix_TREEintoMEM_L3(dvpx_diffuse, dvpx_diffusebits );
h = Ix_TREEintoMEM_L3(dvpx_specular, dvpx_specularbits );
i = Ix_TREEintoMEM_L3(dvpx_texu, dvpx_texubits );
j = Ix_TREEintoMEM_L3(dvpx_texv, dvpx_texvbits );
k = Ix_TREEintoMEM_L3(dvpx_texz, dvpx_texzbits );
printf ( "SETENABS 0x%8x CLRENABS 0x%8x\n", a, b );
printf ( "TREEltZERO_L3 0x%8x TREEgeZERO_L3 0x%8x\n", c, d );
printf ( "MEMltTREE_l3 0x%8x TREEintoMEM_L0(zbuf) 0x%8x\n", e, f );
printf ( "TREEintoMEM_L3(diff) 0x%8x TREEintoMEM_L3(spec) 0x%8x\n", g, h );
printf ( "TREEintoMEM_L3(texu) 0x%8x TREEintoMEM_L3(texv) 0x%8x\n", i, j );
printf ( "TREEintoMEM_L3(texz) 0x%8x\n", k );
}
/*}}} */
/*{{{ time triangle performance*/
then=second_();
for (j=2000; j; j-- ) {
float *coeffs=&eqn[0];
coeffs=tri_zb_d_s_tex ( coeffs, materials[0], 0x87654321, (float *)vert3,(float *)vert4,(float *)vert5,
0 );
coeffs=tri_zb_d_s_tex ( coeffs, materials[1], 0x89ab1234, (float *)vert0,(float *)vert1,(float *)vert2,
0 );
coeffs=tri_zb_d_s_tex ( coeffs, materials[2], 0x87654321, (float *)vert3,(float *)vert4,(float *)vert5,
0 );
coeffs=tri_zb_d_s_tex ( coeffs, materials[3], 0x89ab1234, (float *)vert0,(float *)vert1,(float *)vert2,
0 );
benny+=4;
}
now =second_();
printf ("Gosh golly gee - %d triangles pxpl5ized in %f ticks (%f per sec)\n",
benny, now - then, (float) benny / (now - then));
/*}}} */
/*{{{ debug results*/
printf ( "Dump of equation memory 0x%x\n", (int) &eqn[0] );
for (i=0; i<70; i++ ) {
printf ( "(0x%8x) memory[%d] - 0x%8x (%f)\n", (int) (&ieqn[i]), i, ieqn[i], eqn[i] );
}
/*}}} */
/*{{{ test texture scaling thing*/
{
int ii;
float mult, z1, z2, z3;
z1=0.0234;
z2=0.00134;
z3=0.03516;
for (ii=0; ii<4; ii++ ) {
mult = tex_scalefac ( z1, z2, z3 );
tex_fixz ( &z1, &z2, &z3 );
printf ( "tex_scalefac returned %f (0x%x)\n", mult, *(int *) &mult );
z1*=0.6412;
z2*=0.8412;
z3*=0.4412;
}
}
/*}}} */
/* dump_bins ( screenbins, 10, 4 ); */
}
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pxpl5opt.o
pxpl5tst.o
pxpl5sup.o
walltime.o
c:\pgi\lib\libm.a
c:\pgi\lib\libc.a
c:\pgi\lib\libiserv.a
c:\pgi\lib\pgclib.a
c:\pgi\lib\crtn.o
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.file "pxpl5tst.c"
// PGC Rel 2.0a -opt 4
.text
.align 8
_set_vertex:
// lineno: 43
shl 6, r16, r29
adds r29, r17, r30
fst.l f8, r0(r30)
fst.l f9, 4(r30)
fst.l f10, 8(r30)
fst.l f8, 16(r30)
fst.l f9, 20(r30)
fst.l f10, 24(r30)
orh ha%.C00036, r0, r31
fld.l l%.C00036(r31), f16
fst.l f16, 28(r30)
fst.l f13, 32(r30)
fst.l f14, 36(r30)
fst.l f11, 52(r30)
bri r1
fst.l f12, 56(r30)
// lineno: 57
bri r1
nop
.globl _main
.align 8
_main:
.a2 = 80
.f2 = 160
addu -(.a2+.f2), sp, sp
st.l fp,(.f2-16)(sp)
addu (.f2-16), sp, fp
st.l r1, 4(fp)
fst.d f2, -136(fp)
fst.d f4, -128(fp)
fst.d f6, -120(fp)
st.l r4, -112(fp)
st.l r5, -108(fp)
st.l r6, -104(fp)
st.l r7, -100(fp)
st.l r8, -96(fp)
st.l r9, -92(fp)
st.l r10, -88(fp)
st.l r11, -84(fp)
st.l r12, -80(fp)
st.l r13, -76(fp)
st.l r14, -72(fp)
st.l r15, -68(fp)
// lineno: 0
orh ha%.C00416, r0, r31
fld.d l%.C00416(r31), f6
or (-2023406815&0xffff), r0, r7
orh ((-2023406815>>16)&0xffff), r7, r7
// lineno: 63
call _getFsr
st.l r0, -4(fp)
call _setFsr
or 0x0001, r16, r16
call _malloc
adds 4096, r0, r16
mov r16, r28
adds 8192, r0, r16
mov r28, r15
call _malloc
st.l r28, -8(fp)
mov r16, r28
orh h%.S00309, r0, r31
or l%.S00309, r31, r16
call _printf
st.l r28, -12(fp)
orh ha%.C00312, r0, r31
fld.l l%.C00312(r31), f8
adds 45, r0, r16
ld.l -12(fp), r17
orh ha%.C00313, r0, r31
fld.l l%.C00313(r31), f10
fiadd.ss f8, f0, f9
orh ha%.C00314, r0, r31
fld.l l%.C00314(r31), f11
orh ha%.C00315, r0, r31
fld.l l%.C00315(r31), f12
orh ha%.C00036, r0, r31
fld.l l%.C00036(r31), f14
call _set_vertex
fiadd.ss f0, f0, f13
orh ha%.C00317, r0, r31
fld.l l%.C00317(r31), f8
adds 63, r0, r16
ld.l -12(fp), r17
orh ha%.C00318, r0, r31
fld.l l%.C00318(r31), f9
orh ha%.C00319, r0, r31
fld.l l%.C00319(r31), f10
orh ha%.C00320, r0, r31
fld.l l%.C00320(r31), f11
orh ha%.C00321, r0, r31
fld.l l%.C00321(r31), f12
orh ha%.C00036, r0, r31
fld.l l%.C00036(r31), f13
call _set_vertex
fiadd.ss f13, f0, f14
orh ha%.C00323, r0, r31
fld.l l%.C00323(r31), f8
adds 123, r0, r16
ld.l -12(fp), r17
orh ha%.C00324, r0, r31
fld.l l%.C00324(r31), f9
orh ha%.C00325, r0, r31
fld.l l%.C00325(r31), f10
orh ha%.C00326, r0, r31
fld.l l%.C00326(r31), f11
orh ha%.C00327, r0, r31
fld.l l%.C00327(r31), f12
fiadd.ss f0, f0, f13
call _set_vertex
fiadd.ss f0, f0, f14
orh ha%.C00329, r0, r31
fld.l l%.C00329(r31), f8
adds 15, r0, r16
ld.l -12(fp), r17
orh ha%.C00330, r0, r31
fld.l l%.C00330(r31), f10
fiadd.ss f8, f0, f9
orh ha%.C00314, r0, r31
fld.l l%.C00314(r31), f11
orh ha%.C00331, r0, r31
fld.l l%.C00331(r31), f12
fiadd.ss f0, f0, f13
call _set_vertex
fiadd.ss f0, f0, f14
orh ha%.C00333, r0, r31
fld.l l%.C00333(r31), f8
adds 23, r0, r16
ld.l -12(fp), r17
orh ha%.C00334, r0, r31
fld.l l%.C00334(r31), f9
orh ha%.C00335, r0, r31
fld.l l%.C00335(r31), f10
orh ha%.C00320, r0, r31
fld.l l%.C00320(r31), f11
orh ha%.C00336, r0, r31
fld.l l%.C00336(r31), f12
orh ha%.C00036, r0, r31
fld.l l%.C00036(r31), f14
call _set_vertex
fiadd.ss f0, f0, f13
orh ha%.C00338, r0, r31
fld.l l%.C00338(r31), f8
adds 81, r0, r16
ld.l -12(fp), r17
orh ha%.C00339, r0, r31
fld.l l%.C00339(r31), f9
orh ha%.C00340, r0, r31
fld.l l%.C00340(r31), f10
orh ha%.C00326, r0, r31
fld.l l%.C00326(r31), f11
orh ha%.C00341, r0, r31
fld.l l%.C00341(r31), f12
orh ha%.C00036, r0, r31
fld.l l%.C00036(r31), f13
call _set_vertex
fiadd.ss f13, f0, f14
orh h%.S00342, r0, r31
or l%.S00342, r31, r16
ld.l -12(fp), r28
mov r28, r17
addu 2880, r28, r9
mov r9, r18
addu 4032, r28, r10
mov r10, r19
addu 7872, r28, r11
mov r11, r20
addu 960, r28, r12
addu 1472, r28, r13
call _printf
addu 5184, r28, r14
call _grab_binchunks
adds 400, r0, r16
adds 1024, r0, r16
call _create_screenbins
adds 512, r0, r17
adds 255, r0, r18
addu -4, r15, r19
adds -1, r0, r17
bla r17, r18,.B511
pfmul.dd f0, f0, f0
// lineno: 112
.B511: //.M0000
bla r17, r18, .B511
fst.l f0, 4(r19)++
// lineno: 112
.B349: //.B0001
orh h%.S00371, r0, r31
.DB.B349349:
or l%.S00371, r31, r16
adds 256, r0, r17
adds 512, r0, r18
orh ha%.C00036, r0, r31
fld.l l%.C00036(r31), f16
fst.l f16, -28(fp)
fst.l f16, -24(fp)
fst.l f16, -20(fp)
call _printf
fst.l f16, -16(fp)
orh h%.S00373, r0, r31
or l%.S00373, r31, r16
or (988365312&0xffff), r0, r17
orh ((988365312>>16)&0xffff), r17, r17
or (988286208&0xffff), r0, r18
call _printf
orh ((988286208>>16)&0xffff), r18, r18
orh h%.S00375, r0, r31
or l%.S00375, r31, r16
or (1156194592&0xffff), r0, r17
orh ((1156194592>>16)&0xffff), r17, r17
or (1133134624&0xffff), r0, r18
call _printf
orh ((1133134624>>16)&0xffff), r18, r18
orh h%.S00377, r0, r31
or l%.S00377, r31, r16
or (1034568530&0xffff), r0, r17
orh ((1034568530>>16)&0xffff), r17, r17
or (1034568538&0xffff), r0, r18
call _printf
orh ((1034568538>>16)&0xffff), r18, r18
orh h%.S00379, r0, r31
or l%.S00379, r31, r16
or (1101677410&0xffff), r0, r17
orh ((1101677410>>16)&0xffff), r17, r17
or (1101677426&0xffff), r0, r18
call _printf
orh ((1101677426>>16)&0xffff), r18, r18
orh h%.S00381, r0, r31
or l%.S00381, r31, r16
or (1101677442&0xffff), r0, r17
call _printf
orh ((1101677442>>16)&0xffff), r17, r17
call _second_
nop
fld.l -16(fp), f2
fld.l -20(fp), f3
fld.l -24(fp), f4
fld.l -28(fp), f5
adds 2000, r0, r4
st.l r4, -36(fp)
ld.l -4(fp), r5
or (-1985277388&0xffff), r0, r6
orh ((-1985277388>>16)&0xffff), r6, r6
fst.l f8, -32(fp)
// lineno: 150
.B516: //.M0001
mov r15, r16
.DB.B516516:
fiadd.ss f5, f0, f8
mov r7, r17
mov r12, r18
mov r13, r19
mov r14, r20
call _tri_zb_d_s_tex
mov r0, r21
mov r16, r8
fiadd.ss f4, f0, f8
mov r6, r17
mov r9, r18
mov r10, r19
mov r11, r20
call _tri_zb_d_s_tex
mov r0, r21
mov r16, r8
fiadd.ss f3, f0, f8
mov r7, r17
mov r12, r18
mov r13, r19
mov r14, r20
call _tri_zb_d_s_tex
mov r0, r21
mov r16, r8
fiadd.ss f2, f0, f8
mov r6, r17
mov r9, r18
mov r10, r19
mov r11, r20
call _tri_zb_d_s_tex
mov r0, r21
mov r16, r8
adds 4, r5, r5
adds -1, r4, r4
xor 0x0000, r4, r0
bnc.t .DB.B516516
mov r15, r16
// lineno: 0
st.l r4, -36(fp)
call _second_
st.l r5, -4(fp)
fld.l -32(fp), f16
orh ha%.C00037, r0, r31
fld.l l%.C00037(r31), f20
fsub.ss f8, f16, f17
orh ha%.C00488, r0, r31
fld.d l%.C00488(r31), f26
frcp.ss f17, f18
fmul.ss f17, f18, f19
ld.l -4(fp), r17
fsub.ss f20, f19, f21
xorh 0x8000, r17, r28
fmul.ss f18, f21, f22
orh h%.S00390, r0, r31
or l%.S00390, r31, r16
fmul.ss f17, f22, f23
fsub.ss f20, f23, f24
fmul.ss f24, f22, f25
ixfr r28, f28
fiadd.ss f27, f0, f29
fsub.dd f28, f26, f30
fmov.ds f30, f9
fmul.ss f9, f25, f10
fmov.sd f10, f10
fiadd.ss f8, f0, f12
fmov.sd f17, f8
call _printf
fst.l f12, -40(fp)
orh h%.S00392, r0, r31
or l%.S00392, r31, r16
call _printf
mov r15, r17
ld.l -8(fp), r5
mov r15, r6
st.l r0, -44(fp)
mov r0, r4
// lineno: 173
.B519: //.M0002
fld.l r0(r6), f16
.DB.B519519:
orh h%.S00397, r0, r31
or l%.S00397, r31, r16
fmov.sd f16, f8
mov r5, r17
ld.l r0(r5), r19
call _printf
mov r4, r18
adds 1, r4, r4
addu 4, r5, r5
addu 4, r6, r6
adds -70, r4, r0
bc.t .DB.B519519
fld.l r0(r6), f16
// lineno: 0
orh ha%.C00404, r0, r31
fld.l l%.C00404(r31), f16
orh ha%.C00406, r0, r31
fld.l l%.C00406(r31), f17
fst.l f16, -48(fp)
st.l r4, -44(fp)
fst.l f17, -52(fp)
orh ha%.C00408, r0, r31
fld.l l%.C00408(r31), f18
orh ha%.C00415, r0, r31
fld.d l%.C00415(r31), f2
fst.l f18, -56(fp)
orh ha%.C00414, r0, r31
fld.d l%.C00414(r31), f4
st.l r0, -60(fp)
mov r0, r4
// lineno: 189
.B520: //.M0003
fld.l -48(fp), f8
.DB.B520520:
fld.l -52(fp), f9
call _tex_scalefac
fld.l -56(fp), f10
adds -48, fp, r16
adds -52, fp, r17
adds -56, fp, r18
call _tex_fixz
fst.l f8, -64(fp)
fld.l -64(fp), f16
orh h%.S00412, r0, r31
or l%.S00412, r31, r16
fmov.sd f16, f8
call _printf
ld.l -64(fp), r17
fld.l -48(fp), f16
fld.l -52(fp), f22
fld.l -56(fp), f28
fmov.sd f16, f18
adds 1, r4, r4
fmul.dd f18, f4, f20
fmov.ds f20, f17
fst.l f17, -48(fp)
fmov.sd f22, f24
fmul.dd f24, f2, f26
fmov.ds f26, f23
fst.l f23, -52(fp)
fmov.sd f28, f30
fmul.dd f30, f6, f8
fmov.ds f8, f29
adds -4, r4, r0
fst.l f29, -56(fp)
bc.t .DB.B520520
fld.l -48(fp), f8
// lineno: 0
st.l r4, -60(fp)
// lineno: 0
.B410: //.B0007
// lineno: 199
fld.d -136(fp), f2
fld.d -128(fp), f4
fld.d -120(fp), f6
ld.l -112(fp), r4
ld.l -108(fp), r5
ld.l -104(fp), r6
ld.l -100(fp), r7
ld.l -96(fp), r8
ld.l -92(fp), r9
ld.l -88(fp), r10
ld.l -84(fp), r11
ld.l -80(fp), r12
ld.l -76(fp), r13
ld.l -72(fp), r14
ld.l -68(fp), r15
adds .a2+16, fp, r31
ld.l 4(fp), r1
ld.l 0(fp), fp
bri r1
mov r31, sp
.data
.align 8
.C00036: // (0)
.long 0x3f800000 // 1.00000000E+00
.align 8
.C00416: // (8)
.long 0xecbfb15b, 0x3fdc3c9e // 4.41199999999999981E-01
.C00315: // (16)
.long 0x3fa7ae14 // 1.30999994E+00
.C00314: // (20)
.long 0x3fb33333 // 1.39999998E+00
.C00313: // (24)
.long 0x42f40000 // 1.22000000E+02
.C00312: // (28)
.long 0x42000000 // 3.20000000E+01
.C00321: // (32)
.long 0xc0028f5c // -2.03999996E+00
.C00320: // (36)
.long 0x40066666 // 2.09999990E+00
.C00319: // (40)
.long 0x42180000 // 3.80000000E+01
.C00318: // (44)
.long 0x41b00000 // 2.20000000E+01
.C00317: // (48)
.long 0x42280000 // 4.20000000E+01
.C00327: // (52)
.long 0x3fc3d70a // 1.52999997E+00
.C00326: // (56)
.long 0x405b851f // 3.43000007E+00
.C00325: // (60)
.long 0x444d8000 // 8.22000000E+02
.C00324: // (64)
.long 0x42780000 // 6.20000000E+01
.C00323: // (68)
.long 0x41400000 // 1.20000000E+01
.C00331: // (72)
.long 0x4053d70a // 3.30999994E+00
.C00330: // (76)
.long 0x441b8000 // 6.22000000E+02
.C00329: // (80)
.long 0x43040000 // 1.32000000E+02
.C00336: // (84)
.long 0x3f851eb8 // 1.03999996E+00
.C00335: // (88)
.long 0x430a0000 // 1.38000000E+02
.C00334: // (92)
.long 0x43160000 // 1.50000000E+02
.C00333: // (96)
.long 0x430e0000 // 1.42000000E+02
.C00341: // (100)
.long 0xbfc3d70a // -1.52999997E+00
.C00340: // (104)
.long 0x435e0000 // 2.22000000E+02
.C00339: // (108)
.long 0x43220000 // 1.62000000E+02
.C00338: // (112)
.long 0x43180000 // 1.52000000E+02
.align 8
.C00488: // (120)
.long 0x80000000, 0x43300000 // 4.50360177485414400E+15
.C00037: // (128)
.long 0x40000000 // 2.00000000E+00
.C00404: // (132)
.long 0x3cbfb15b // 2.33999994E-02
.C00406: // (136)
.long 0x3aafa2f0 // 1.33999996E-03
.C00408: // (140)
.long 0x3d1003ef // 3.51600014E-02
.align 8
.C00415: // (144)
.long 0x432ca57a, 0x3feaeb1c // 8.41199999999999948E-01
.C00414: // (152)
.long 0xdcc63f14, 0x3fe484b5 // 6.41199999999999992E-01
.data
.align 1
.S00309: //
// "pxpl5tst is go\n"
.byte 0x70,0x78,0x70,0x6c,0x35,0x74,0x73,0x74,0x20,0x69,0x73
.byte 0x20,0x67,0x6f,0x0a,0x00
.S00342: //
// "vertices 0x%x vert0 0x%x vert1 0x%x vert2 0x%x\n"
.byte 0x76,0x65,0x72,0x74,0x69,0x63,0x65,0x73,0x20,0x30,0x78
.byte 0x25,0x78,0x20,0x76,0x65,0x72,0x74,0x30,0x20,0x30,0x78
.byte 0x25,0x78,0x20,0x76,0x65,0x72,0x74,0x31,0x20,0x30,0x78
.byte 0x25,0x78,0x20,0x76,0x65,0x72,0x74,0x32,0x20,0x30,0x78
.byte 0x25,0x78,0x0a,0x00
.S00371: //
// "SETENABS 0x%8x CLRENABS 0x%8x\n"
.byte 0x53,0x45,0x54,0x45,0x4e,0x41,0x42,0x53,0x20,0x20,0x20
.byte 0x20,0x20,0x20,0x30,0x78,0x25,0x38,0x78,0x20,0x43,0x4c
.byte 0x52,0x45,0x4e,0x41,0x42,0x53,0x20,0x20,0x20,0x20,0x20
.byte 0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x30,0x78,0x25
.byte 0x38,0x78,0x0a,0x00
.S00373: //
// "TREEltZERO_L3 0x%8x TREEgeZERO_L3 0x%8x\n"
.byte 0x54,0x52,0x45,0x45,0x6c,0x74,0x5a,0x45,0x52,0x4f,0x5f
.byte 0x4c,0x33,0x20,0x30,0x78,0x25,0x38,0x78,0x20,0x54,0x52
.byte 0x45,0x45,0x67,0x65,0x5a,0x45,0x52,0x4f,0x5f,0x4c,0x33
.byte 0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x30,0x78,0x25
.byte 0x38,0x78,0x0a,0x00
.S00375: //
// "MEMltTREE_l3 0x%8x TREEintoMEM_L0(zbuf) 0x%8x\n"
.byte 0x4d,0x45,0x4d,0x6c,0x74,0x54,0x52,0x45,0x45,0x5f,0x6c
.byte 0x33,0x20,0x20,0x30,0x78,0x25,0x38,0x78,0x20,0x54,0x52
.byte 0x45,0x45,0x69,0x6e,0x74,0x6f,0x4d,0x45,0x4d,0x5f,0x4c
.byte 0x30,0x28,0x7a,0x62,0x75,0x66,0x29,0x20,0x30,0x78,0x25
.byte 0x38,0x78,0x0a,0x00
.S00377: //
// "TREEintoMEM_L3(diff) 0x%8x TREEintoMEM_L3(spec) 0x%8x\n"
.byte 0x54,0x52,0x45,0x45,0x69,0x6e,0x74,0x6f,0x4d,0x45,0x4d
.byte 0x5f,0x4c,0x33,0x28,0x64,0x69,0x66,0x66,0x29,0x20,0x30
.byte 0x78,0x25,0x38,0x78,0x20,0x54,0x52,0x45,0x45,0x69,0x6e
.byte 0x74,0x6f,0x4d,0x45,0x4d,0x5f,0x4c,0x33,0x28,0x73,0x70
.byte 0x65,0x63,0x29,0x20,0x30,0x78,0x25,0x38,0x78,0x0a,0x00
.S00379: //
// "TREEintoMEM_L3(texu) 0x%8x TREEintoMEM_L3(texv) 0x%8x\n"
.byte 0x54,0x52,0x45,0x45,0x69,0x6e,0x74,0x6f,0x4d,0x45,0x4d
.byte 0x5f,0x4c,0x33,0x28,0x74,0x65,0x78,0x75,0x29,0x20,0x30
.byte 0x78,0x25,0x38,0x78,0x20,0x54,0x52,0x45,0x45,0x69,0x6e
.byte 0x74,0x6f,0x4d,0x45,0x4d,0x5f,0x4c,0x33,0x28,0x74,0x65
.byte 0x78,0x76,0x29,0x20,0x30,0x78,0x25,0x38,0x78,0x0a,0x00
.S00381: //
// "TREEintoMEM_L3(texz) 0x%8x\n"
.byte 0x54,0x52,0x45,0x45,0x69,0x6e,0x74,0x6f,0x4d,0x45,0x4d
.byte 0x5f,0x4c,0x33,0x28,0x74,0x65,0x78,0x7a,0x29,0x20,0x30
.byte 0x78,0x25,0x38,0x78,0x0a,0x00
.S00390: //
// "Gosh golly gee - %d triangles pxpl5ized in %f ticks (%f per sec)\n"
.byte 0x47,0x6f,0x73,0x68,0x20,0x67,0x6f,0x6c,0x6c,0x79,0x20
.byte 0x67,0x65,0x65,0x20,0x2d,0x20,0x25,0x64,0x20,0x74,0x72
.byte 0x69,0x61,0x6e,0x67,0x6c,0x65,0x73,0x20,0x70,0x78,0x70
.byte 0x6c,0x35,0x69,0x7a,0x65,0x64,0x20,0x69,0x6e,0x20,0x25
.byte 0x66,0x20,0x74,0x69,0x63,0x6b,0x73,0x20,0x28,0x25,0x66
.byte 0x20,0x70,0x65,0x72,0x20,0x73,0x65,0x63,0x29,0x0a,0x00
.S00392: //
// "Dump of equation memory 0x%x\n"
.byte 0x44,0x75,0x6d,0x70,0x20,0x6f,0x66,0x20,0x65,0x71,0x75
.byte 0x61,0x74,0x69,0x6f,0x6e,0x20,0x6d,0x65,0x6d,0x6f,0x72
.byte 0x79,0x20,0x30,0x78,0x25,0x78,0x0a,0x00
.S00397: //
// "(0x%8x) memory[%d] - 0x%8x (%f)\n"
.byte 0x28,0x30,0x78,0x25,0x38,0x78,0x29,0x20,0x6d,0x65,0x6d
.byte 0x6f,0x72,0x79,0x5b,0x25,0x64,0x5d,0x20,0x2d,0x20,0x30
.byte 0x78,0x25,0x38,0x78,0x20,0x28,0x25,0x66,0x29,0x0a,0x00
.S00412: //
// "tex_scalefac returned %f (0x%x)\n"
.byte 0x74,0x65,0x78,0x5f,0x73,0x63,0x61,0x6c,0x65,0x66,0x61
.byte 0x63,0x20,0x72,0x65,0x74,0x75,0x72,0x6e,0x65,0x64,0x20
.byte 0x25,0x66,0x20,0x28,0x30,0x78,0x25,0x78,0x29,0x0a,0x00
.extern _tex_fixz
.extern _tex_scalefac
.extern _tri_zb_d_s_tex
.extern _second_
.extern _create_screenbins
.extern _grab_binchunks
.extern _printf
.extern _malloc
.extern _setFsr
.extern _getFsr
+111
View File
@@ -0,0 +1,111 @@
#define divpl5_xshift 6
#define divpl5_yshift 7
#define X 0
#define Y 1
typedef struct s_bininfo {
int bin_minx;
int bin_miny;
int bin_maxx;
int bin_maxy;
} bininfo;
typedef struct s_preplane {
float x23;
float x31;
float x12;
float C;
} preplane;
/*{{{ datastructures for binitizing*/
/* *********************************
what are the best datastructures for binitizing ?
they need working out in conjunction with the DMA engine
protocol
the DMA engine takes, per bin, an array of 64-bit words, organised as
address:count|opcode
the address is where the IGC data resides, the count is the no of
64-bit words in the IGC packet. The packet could be typically a
triangle, a partial triangle, a sphere or a chunk of end-of-frame data
triangles are 30-40 32-bit words long.
a screen may be anything from 512 to 1280 pixels wide, which is from 8
to 64 bins wide, typically 10 (NTSC) - awkward, needs * rather than <<
a typical bin data looks like
address:count
address:count
address:count
...
address:count
in contiguous memory locations. How to assemble these live with
minimal mallocing?
YEAH - good one hardware guys. The macro language supports a GOTO;
so we simply malloc chunks of say 32 64-bit words, and the last one
contains GOTO next chunk. So we never need to memcpy. In fact in the
steady-state we never need to malloc.
So if we have to render a triangle, we have to put its IGC data into
memory, then reference this data from multiple bin lists. All rendered
triangles can be put into a huge pool (double-buffered), which is
just incremented.
So we have the structures in place - how do we binitize?
Lets render a triangle -
pre --> enable voodoo 1
edge 4
edge 4
edge 4
z compare 4
z replace 4
lum 4
spec 4
scalar_stuff 1
p -->
We need to place pre:42 (pre:21?) into all the bins the triangle overlaps
For each bin we need a head chunk, and a tail chunk. Each chunk contains a
count (so I know where to put the next triangle).
I think I am starting to understand how to do this ...
*/
/*}}} */
#define BIN_FULL (254*2*4) /* when index==this, chain into next chunk */
typedef struct s_binchunk {
/* force this to be 1/2 page long */
int DMA_opcodes[(BIN_FULL>>2)+2]; /* force dbl-alignment, 64 triangles worth */
int usage; /* in 32-bit words, always dbl-bumped */
struct s_binchunk *next; /* only used for housekeeping */
} binchunk;
typedef struct s_screenbin {
binchunk *head;
binchunk *tail;
} screenbin;
typedef struct s_coeffchunk {
/* force this to be 65536 bytes long */
int IGC_opcodes[65532>>2];
struct s_coeffchunk *next; /* only used for housekeeping */
} coeffchunk;
#define COEFF_FULL (65532-512) /* when bytes>=this, chain into next chunk */
+515
View File
@@ -0,0 +1,515 @@
/*{{{ Pixel-Planes V support code*/
/* **********************************
File pxpl5sup.c
Project pazpl5
Author p j atkin
(c) DIVISION Ltd 1993
*/
/*}}} */
/*{{{ on pxpl5 oddness*/
/*
pxpl5 forces you to do 3 things you normally wouldnt do on
a graphics system - edgeize, planarize and binitize primitives
edgeizing involves turning a polygon into a set of edges, each
edge described by an expression of the form f(x,y) = Ax + By + C,
where conventionally a point is INSIDE the edge if f(x,y) > 0 at (x,y)
planarization is pretty similar, and is used for Z-buffering,
Gouraud-shading and texturing. Planarization involves computing a
screen-space planar equation for a given variable - so to Z-buffer,
Gouraud-shade and texture a triangle we need to compute
Z=fz(x,y), r=fr(x,y), g=fg(x,y), b=fb(x,y), u=fu(x,y), v=fv(x,y)
where each of fz, fr, fg, fb, fu, fv are cast as expression of the form
f=Ax + By + C
binitization is different, and stems from the original MIMDness of pxpl5 -
rather than build a 640x512 array of pixel-processors, we use multiple
arrays of 128x128 (or 64x128) and if the polygons scatter statistically
well, we can get many times more performance for a given number of
pixel-processors
in order to do this, as a triangle is transformed to screen-space, we need
to determine how many screen-space regions of 64x128 are overlapped by the
triangle, and place the triangle into 'bins' associated with each region.
binitization may kill me yet.
*/
/*}}} */
/*{{{ includes*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "DMAengn.h"
#include "pxpl5typ.h"
/*}}} */
/*{{{ void edgeize ( float *eqn, float *p1, float *p2 )*/
void edgeize ( float *eqn, float *p1, float *p2 )
{
/* *********************
takes 2 point p1 and p2 and computes the edge
equation edge Ax + By + C, +ve inside, -ve outside
the edge
4 cases -
a) p0 b) p1
\ /
\ /
\ /
p1 p0
c) p1 d) p0
\ /
\ /
\ /
p0 p1
We need to ensure that in all cases we treat the edges identically,
e.g a = c with flipped vertices / opcode, ditto b, d
*/
float A, B, C;
/*
however, 1st approximation - this will suffer
rounding errors + DDA cracks
*/
eqn[0]=p1[Y] - p2[Y];
eqn[1]=p2[X] - p1[X];
eqn[2]=(p2[Y]*p1[X]) - (p2[X]*p1[Y]);
}
/*}}} */
/*{{{ on planarization*/
/*
Examination of the equations for planarization, and the UNC rendering
library, indicates some useful speedups for planarizing.
A recurring term is the divisor for all 3 coefficients, termed C. This
is independent of the planarized variable; it only varies with screen-space
X and Y, so can be precomputed once per triangle and re-used for
all planarized expressions
ditto some recurring difference expressions (x1 - x2 etc.)
So preplanarize precomputes the useful stuff into a structure for
subsequent planarizing. Ideally of course we precompute this into
a set of floating-point registers. Later.
Or maybe right now - how many registers do I need to do this?
rx23 \
rx31 > the recurring differences
rx12 /
rC the divisor for preplanarizing; now to planarize, strive to keep
rv1y
rv2y
rv3y
rv1x
rv2x and
rv3x in registers also
so we keep 10 fp registers hanging around, so to planarize a variable
we access memory 3 times, to load
v1
v2
v3 (which are used many times) using up just 13 fp registers
then 3 writes to eqn->A, eqn->B, eqn->C
this should be very fast indeed on an XP
The correct structure for the code is probably a dispatch vector of
C functions associated with each type of triangle - e.g 24-bit Gouraud,
8-bit Gouraud + intrinsic + spec
8-bit Gouraud + intrinsic + spec + texture + MIP etc,
the function calls an assembly stub which preplanarizes, then
repeatedly calls an assembly-coded planarize as many times as needed
Planarization looks like a cost of 25 ticks per planarized variable,
so we can planarize
Z, diffuse, spec in 1.5 uS (667k triangles/sec)
Z, diffuse, spec, u, v, homo in 3uS (333k )
Z, diffuse, spec, u, v, homo, MIP in 3.5uS, or (286k )
it looks like we can edgize in about 20 ticks per edge, or 1.2 uS per
triangle, so the edgize / planarize costs become
Z, diffuse, spec in 2.7 uS (370k triangles/sec)
Z, diffuse, spec, u, v, homo in 4.2 uS (238k )
Z, diffuse, spec, u, v, homo, MIP in 3.5uS, or (212k )
or the VWE benchmark of flat-shaded textured quads -
Z, u, v, homo, MIP in 3.6uS or (278k )
SO we are in shape performance-wise for planarization. How is binitizing.
Read on.
*/
/*}}} */
/*{{{ void preplanarize ( preplane *p, float *v1, float *v2, float *v3 )*/
void preplanarize ( preplane *p, float *v1, float *v2, float *v3 )
{
float v1x=v1[X];
float v2x=v2[X];
float v3x=v3[X];
float v1y=v1[Y];
float v2y=v2[Y];
float v3y=v3[Y];
p->x23=v2x - v3x;
p->x31=v3x - v1x;
p->x12=v1x - v2x;
p->C=1.0f / ((v1x * (v2x - v3x)) +
(v2x * (v3x - v1x)) +
(v3x * (v1x - v2x)));
}
/*}}} */
/*{{{ void planarize ( float *eqn, float *v1, float *v2, float *v3, int index, preplane *p )*/
void planarize ( float *eqn, float *v1, float *v2, float *v3, int index, preplane *p )
{
float v1x=v1[X];
float v2x=v2[X];
float v3x=v3[X];
float v1y=v1[Y];
float v2y=v2[Y];
float v3y=v3[Y];
float v1f=v1[index];
float v2f=v2[index];
float v3f=v3[index];
eqn[0]=-p->C* ((v1y * (v2f - v3f)) +
(v2y * (v3f - v1f)) +
(v3y * (v1f - v2f)));
eqn[1]=-p->C*((v1f * p->x23) +
(v2f * p->x31) +
(v3f * p->x12));
eqn[2]= p->C*((v1x*((v2y*v3f) - (v3y*v2f))) +
(v2x*((v3y*v1f) - (v1y*v3f))) +
(v3x*((v1y*v2f) - (v2y*v1f))));
}
/*}}} */
/*{{{ void planarizip ( float *eqn,*/
void planarizip ( float *eqn,
float *v1, float *v2, float *v3, int index,
float fx1, float fx2, float fx3,
float fy1, float fy2, float fy3,
float fx23, float fx31, float fx12,
float fC,
int times )
{
int i;
register int opcode=0x501;
*((int *) eqn++)=opcode;
for (i=times; i; i-- ) {
register float fv1=*v1++;
register float fv2=*v2++;
register float fv3=*v3++;
*eqn++= fC * ((fy1 * (fv3 - fv2)) +
(fy2 * (fv1 - fv3)) +
(fy3 * (fv2 - fv1)));
*eqn++=-fC*((fv1 * fx23) +
(fv2 * fx31) +
(fv3 * fx12));
*eqn++= fC*((fx1*((fy2*fv3) - (fy3*fv2))) +
(fx2*((fy3*fv1) - (fy1*fv3))) +
(fx3*((fy1*fv2) - (fy2*fv1))));
}
}
/*}}} */
/*{{{ variables for binning*/
binchunk *free_binchunks=NULL;
screenbin *screen0bins=NULL,
*screen1bins=NULL,
*screenbins =NULL;
int DMAscreen=0, writeScreen=1;
/*}}} */
/*{{{ void grab_binchunks ( int grab_chunks )*/
void grab_binchunks ( int grab_chunks )
{
/* mallocs and inits an initial tranche of binchunks */
int i;
/* printf ("Grab_binchunks, needs %d\n", grab_chunks ); */
for (i=0; i<grab_chunks; i++ ) {
binchunk *bin;
bin=(binchunk *) malloc( sizeof (binchunk));
if (bin == NULL) {
printf ("Malloc failed in grab_binchunk\n" );
}
bin->usage=0;
bin->next=free_binchunks;
free_binchunks=bin;
}
}
/*}}} */
/*{{{ binchunk *next_binchunk ()*/
binchunk *next_binchunk ()
{
binchunk *chunky;
if (free_binchunks == NULL) {
grab_binchunks(8);
}
chunky=free_binchunks;
chunky->usage=0;
free_binchunks=free_binchunks->next;
return chunky;
}
/*}}} */
/*{{{ void create_screenbins ( int screenx, int screeny )*/
void create_screenbins ( int screenx, int screeny )
{
int binsx=screenx >> divpl5_xshift;
int binsy=screeny >> divpl5_yshift;
int i, j;
printf ("create_screenbins, %d by %d\n", screenx, screeny );
screen0bins=(screenbin *) malloc (binsx*binsy*sizeof(screenbin));
screen1bins=(screenbin *) malloc (binsx*binsy*sizeof(screenbin));
printf ("grabbing screen0bins\n" );
for (i=0; i<binsx*binsy; i++ ) {
screen0bins[i].head=next_binchunk();
screen0bins[i].tail=screen0bins[i].head;
}
printf ("grabbing screen1bins\n" );
for (i=0; i<binsx*binsy; i++ ) {
screen1bins[i].head=next_binchunk();
screen1bins[i].tail=screen1bins[i].head;
}
screenbins=screen0bins;
printf ("created screenbins\n" );
}
/*}}} */
/*{{{ void liberate_screenbins ( screenbin *screenbins, int screenx, int screeny )*/
void liberate_screenbins ( screenbin *screenbins, int screenx, int screeny )
{
/* ********************
take the whole screen and put it back onto the free list, EXCEPT for
1st chunk in each screen region
*/
int i, j;
for (i=0; i<screenx; i++ ) {
for (j=0; j<screeny; j++ ) {
binchunk *chunk=screenbins->head;
if (chunk == NULL) {
printf ("Error, initially empty region in liberate_screenbins\n" );
}
chunk->usage=0;
chunk=chunk->next;
while (chunk) {
binchunk *nxt=chunk->next;
chunk->next=free_binchunks;
chunk=nxt;
}
screenbins++;
}
}
}
/*}}} */
/*{{{ void binitize ( int macro_lo, int macro_hi,*/
void binitize ( int macro_lo, int macro_hi,
float fminx, float fminy,
float fmaxx, float fmaxy,
int screen_maxx, int screen_maxy,
int screen_bins_x )
{
/*
binitizes a primitive of known screen-space extents
the DMA engine macros associated with the primitive are held
in macro_lo, macro_hi - typically { SEND macro_address,size }
the screen-space extents are held in fminx .. fmaxy, and
the integer screen resolution is held in screen_maxx, screen_maxy,
with (optimization) the bin-count in the x-direction held in
screen_bins_x
To binitize, we first work out what is the lower left corner bin,
then outer loop in y, inner loop x, dropping the macro into all
encountered bins.
*/
int minx, miny,
maxx, maxy;
minx=(int) fminx;
miny=(int) fminy;
maxx=(int) fmaxx;
maxy=(int) fmaxy;
if (maxx < 0) return;
if (maxy < 0) return;
if (minx > screen_maxx) return;
if (miny > screen_maxy) return;
minx >>= divpl5_xshift;
miny >>= divpl5_yshift;
maxx >>= divpl5_xshift;
maxy >>= divpl5_yshift;
/*
so we have minimax xy in screen-space bin indices -
put the data into bins
*/
{
/* get 1st bin */
int screenbinix=(miny*screen_bins_x) + minx;
screenbin *top_left_bin=&screenbins[screenbinix];
screenbin *lbin=top_left_bin;
screenbin *xbin=lbin;
register int x, y;
/* scan down all y bins */
for (y=(maxy-miny)+1; y; y-- ) {
/* scan across all x bins */
for (x=(maxx-minx)+1; x; x-- ) {
/* add doubleword macro to bin */
register binchunk *bin=xbin->tail;
register int usage=bin->usage;
if (bin->usage == BIN_FULL) {
binchunk *nextbin=next_binchunk ();
bin->DMA_opcodes[usage++]=(int) nextbin;
bin->DMA_opcodes[usage++]=DMA_GOTO;
bin=nextbin;
xbin->tail=bin;
usage=0;
}
bin->DMA_opcodes[usage++]=macro_lo;
bin->DMA_opcodes[usage++]=macro_hi;
bin->usage=usage;
xbin++;
}
lbin+=screen_bins_x;
}
}
}
/*}}} */
/*{{{ void safe_binitize ( int macro_lo, int macro_hi,*/
void safe_binitize ( int macro_lo, int macro_hi,
float fminx, float fminy,
float fmaxx, float fmaxy,
int screen_bins_x )
{
/*
binitizes a primitive of known screen-space extents
the DMA engine macros associated with the primitive are held
in macro_lo, macro_hi - typically { SEND macro_address,size }
the screen-space extents are held in fminx .. fmaxy, and
the integer screen resolution is held in screen_maxx, screen_maxy,
with (optimization) the bin-count in the x-direction held in
screen_bins_x
To binitize, we first work out what is the lower left corner bin,
then outer loop in y, inner loop x, dropping the macro into all
encountered bins.
*/
int minx, miny,
maxx, maxy;
minx=(int) fminx;
miny=(int) fminy;
maxx=(int) fmaxx;
maxy=(int) fmaxy;
minx >>= divpl5_xshift;
miny >>= divpl5_yshift;
maxx >>= divpl5_xshift;
maxy >>= divpl5_yshift;
/*
so we have minimax xy in screen-space bin indices -
put the data into bins
*/
{
/* get 1st bin */
int screenbinix=(miny*screen_bins_x) + minx;
screenbin *top_left_bin=&screenbins[screenbinix];
screenbin *lbin=top_left_bin;
screenbin *xbin=lbin;
register int x, y;
/* scan down all y bins */
for (y=(maxy-miny)+1; y; y-- ) {
/* scan across all x bins */
for (x=(maxx-minx)+1; x; x-- ) {
/* add doubleword macro to bin */
register binchunk *bin=xbin->tail;
register int usage=bin->usage;
if (bin->usage == BIN_FULL) {
binchunk *nextbin=next_binchunk ();
bin->DMA_opcodes[usage++]=(int) nextbin;
bin->DMA_opcodes[usage++]=DMA_GOTO;
bin=nextbin;
xbin->tail=bin;
usage=0;
}
bin->DMA_opcodes[usage++]=macro_lo;
bin->DMA_opcodes[usage++]=macro_hi;
bin->usage=usage;
xbin++;
}
lbin+=screen_bins_x;
}
}
}
/*}}} */
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+56
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@@ -0,0 +1,56 @@
#ifndef pxplmacr_h
#define pxplmacr_h
#define pxpl5_noop() \
st.l r0, 4(rcoeffptr)
#define pxpl5_noop_inc() \
st.l r0, 4(rcoeffptr); \
adds 4, rcoeffptr, rcoeffptr
#define pxpl5op_0_l(reg,op) \
or (op())&0xffff, r0, reg
#define pxpl5op_0_h(reg,op) \
orh ((op())>>16)&0xffff, reg, reg
#define pxpl5op_0(reg,op) \
pxpl5op_0_l(reg,op); pxpl5op_0_h(reg,op)
#define pxpl5op_1_l(reg,op,a) \
or (op(a))&0xffff, r0, reg
#define pxpl5op_1_h(reg,op,a) \
orh ((op(a))>>16)&0xffff, reg, reg
#define pxpl5op_1(reg,op,a) \
pxpl5op_1_l(reg,op,(a)); pxpl5op_1_h(reg,op,(a))
#define pxpl5op_2_l(reg,op,a,b) \
or (op((a),(b)))&0xffff, r0, reg
#define pxpl5op_2_h(reg,op,a,b) \
orh ((op((a),(b)))>>16)&0xffff, reg, reg
#define pxpl5op_2(reg,op,a,b) \
pxpl5op_2_l(reg,op,(a),(b)); pxpl5op_2_h(reg,op,(a),(b))
#define pxpl5op_3_l(reg,op,a,b,c) \
or (op((a),(b),(c)))&0xffff, r0, reg
#define pxpl5op_3_h(reg,op,a,b,c) \
orh ((op((a),(b),(c)))>>16)&0xffff, reg, reg
#define pxpl5op_3(reg,op,a,b,c) \
pxpl5op_3_l(reg,op,(a),(b),(c)); pxpl5op_3_h(reg,op,(a),(b),(c))
#define pxpl5op_4(reg,op,a,b,c,d) \
or (op((a),(b),(c),(d)))&0xffff, r0, reg; \
orh ((op((a),(b),(c),(d)))>>16)&0xffff, reg, reg
#define pxpl5op_5(reg,op,a,b,c,d,e) \
or (op((a),(b),(c),(d),(e)))&0xffff, r0, reg; \
orh ((op((a),(b),(c),(d),(e)))>>16)&0xffff, reg, reg
#endif
+103
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@@ -0,0 +1,103 @@
/*
This code relies on the hand-assembly coded edgize, preplanarize,
planarize and binitize functions.
Preplanarize is called first - this caches the edgizing and planarizing
repeated expressions into registers, and computes screen-space minimax
x and y coordinates -
rminx
rminy
rmaxx
rmaxy
rx23 \
rx31 > the recurring differences
rx12 /
rC the divisor for preplanarizing
rv1y
rv2y
rv3y
rv4y for quads
rv1x
rv2x
rv3x
and rv4x for quads
Total 16 fp regs
To ease planarizing and z-buffering, we will keep vertex pointers in
registers throughout -
rv1
rv2
rv3
rv4
Total 4 int regs
A subsequent call to edgeize_triangle edgizes the three edges
correctly, in order, and will guarantee no DDA cracks. A similar edgize_quad
needs implementing (so I need to reserve rvx4 and rvy4)
After edgizing we proceed to planarize - this is done by chained calls to
planarize_fn, passing in 3 fp registers which hold the v1 v2 v3 values to
be planarized, and a pointer register to where A B C should be stored.
Then binitize_fn is called, which uses the pre-computed minimax values to
drop the macro value, coefficient start address and coefficient count into
screen-bins.
So, in general, a triangle drawing function will call
preplanarize_fn ( float *coeffs, VERTEX *a, VERTEX *b, VERTEX *c, VERTEX *d )
edgize_tri_fn ( void )
zbuffer_fn ( void )
planarize_fn ( int opcode, ) many times
binitize_fn () to close
*/
#include <stdio.h>
#include <stdlib.h>
#include "pxpl5asm.h"
float *tri_zb_d_s ( float *coeffs, float *v1, float *v2, float *v3 )
{
/* z-buffered, diffuse-lit, specular lit triangle */
float *t=coeffs;
preplanarize_fn ( coeffs, 0, v1, v2, v3, NULL );
edgize_tri_fn ();
zbuffer_fn ();
planarize_fn ( 0x666, 3 );
planarize_fn ( 0x666, 4 );
return safe_binitize_fn ( 0x666, 4, 10 );
}
float *tri_zb_d_s_tex ( float *coeffs, float *v1, float *v2, float *v3 )
{
/* z-buffered, diffuse-lit, specular lit, textured triangle */
float *t=coeffs;
preplanarize_fn ( coeffs, 0, v1, v2, v3, NULL );
edgize_tri_fn ();
zbuffer_fn ();
planarize_fn ( 0x666, 3 ); /* diff */
planarize_fn ( 0x666, 4 ); /* spec */
planarize_fn ( 0x666, 5 ); /* u */
planarize_fn ( 0x666, 6 ); /* v */
planarize_fn ( 0x666, 7 ); /* homo */
return safe_binitize_fn ( 0x666, 4, 10 );
}
float *tri_zb_d_s_texm ( float *coeffs, float *v1, float *v2, float *v3 )
{
/* z-buffered, diffuse-lit, specular lit, textured, mipped triangle */
return NULL;
}
+129
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#ifndef register_h
//
// integer registers first
//
// icoeff_p = vpx ( icoeff_p, codeword, opcode0, conn, backwards );
// icoeff_p = vpx ( icoeff_p, codeword, opcode0, conn, backwards );
//
#define iparam1 r16
#define iparam2 r17
#define iparam3 r18
#define iparam4 r19
#define iparam5 r20
//
#define rv1 iparam3
#define rv2 iparam4
#define rv3 r20
#define needs_texture r21
#define rcoeffptr r22
#define rcoeffsave r23
#define rvertex r24
#define rcoeff_pp r25
#define rcoeffmax r26
#define n_polygons r27
#define extra_stuff r28
#define itmp1 r29
#define itmp2 r30
#define lbin r4
#define xbin r5
#define ycnt r6
#define xcnt r7
#define usage r8
#define bin r9
#define opcode0 r10
#define backwards r11
#define iminx r12
#define iminy r13
#define imaxx r14
#define imaxy r15
// iminx iminy etc only used early in binitization
#define n_verts usage
#define rvert bin
//
// fp registers
//
//
// screen-space minimax for binitizing
// PASS NO FLOAT PARAMETERS IN HERE OR YOU ARE S T U F F E D
//
#define fparam1 f8
#define fparam2 f9
#define fparam3 f10
#define fminx f8
#define fminy f9
#define fmaxx f10
#define fmaxy f11
//
// some sphere-only registers
//
#define fxc f12
#define fyc f13
#define fzc f14
#define frad f15
#define flx f16
#define fly f17
#define flz f20
#define frz f21
#define ftwo ftexscale
#define fr2 fminz
#define fx2y2 f22
#define fr12 f23
#define fK f24
#define frinvlz f25
// re-use lz - not needed after load
#define fxtwo ftmp7
#define fytwo ftmp8
#define fminus1 ftmp9
// x, y coords for tris/quads
#define fx1 f12
#define fy1 f13
#define fx2 f14
#define fy2 f15
#define fx3 f16
#define fy3 f17
#define fx4 f18
#define fy4 f19
// repeated expressions fx32, fx13, fx21, fC
#define fx32 f20
#define fx13 f21
#define fx21 f22
#define fC f23
#define fy31 fx13
#define fy12 fx21
#define fy23 fx32
// screen-space function values for planarizing
#define fv1 f24
#define fv2 f25
#define fv3 f26
#define ftmp1 f28
#define ftmp2 f29
#define ftmp3 f30
#define ftmp4 f31
#define ftmp5 f27
#define ftmp6 f4
#define ftmp7 f6
#define ftmp8 f7
#define ftmp9 ftmp4
#define fmaterial f3
#define ftexscale f2
#define fminz f5
#else
#endif
+1
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@@ -0,0 +1 @@
set DOS4G=quiet
+115
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@@ -0,0 +1,115 @@
/*{{{ about this code*/
/*
This is the shading function of the EMC's in C
it is really so I can get a handle on how much work is needed
in the back-end for end of frame and end of texture
The shading function is
pixel_colour = (fog_colour * fog_fade) +
((1 - fog_fade) *
((instrinsic_colour * diffuse_shading) * texture_colour) +
(specular_colour * light_colour));
*/
/*}}} */
#include <stdio.h>
#include <stdlib.h>
#include "igctypes.h"
#include "pxlmem.h"
#include "igcops.h"
/*{{{ texture memory !*/
int *texture;
/*}}} */
/*{{{ void test_access ( pixel_memory *t )*/
void test_access ( pixel_memory *t )
{
printf ("Starting - t empty\n" );
write_pixmem_bit ( t, 0, 1 );
printf ( "bit 0 now %d should be 1\n", read_pixmem_bit ( t, 0 ));
write_pixmem_bit ( t, 0, 0 );
printf ( "bit 0 now %d should be 0\n", read_pixmem_bit ( t, 0 ));
write_pixmem_bit ( t, 10, 1 );
printf ( "bit 10 now %d should be 1\n", read_pixmem_bit ( t, 10 ));
printf ( "and bit 0 now %d\n", read_pixmem_bit ( t, 0 ));
printf ( "about to write 7 sig bits of -11 into bit 29\n" );
write_pixmem_word ( t, 29, 7, -11 );
printf ( "and read back %d\n", read_pixmem_word ( t, 29, 7, 1 ));
printf ( "about to write 13 sig bits of -196 into bit 79\n" );
write_pixmem_word ( t, 79, 13, -196 );
printf ( "and read back %d\n", read_pixmem_word ( t, 79, 13, 1 ));
}
/*}}} */
/*{{{ pixel_tile *create_pixmem()*/
pixel_tile *create_pixmem()
{
int i;
pixel_tile *tile;
tile=(pixel_tile *) malloc ( sizeof ( pixel_tile ));
printf ("Creating pixel memory\n" );
for (i=0; i<64*128; i++ ) {
pixel_memory *pixel;
pixel=(pixel_memory *) malloc ( sizeof ( pixel_memory ));
if (pixel)
tile->array[i]=pixel;
else {
printf ("NULL Pixel in malloc at i=%d\n", i );
exit (666);
}
}
printf ("Created pixel memory\n" );
return tile;
}
/*}}} */
/*{{{ int *create_texture()*/
int *create_texture()
{
int *tex;
tex=(int *) malloc ( 512 * 512 * sizeof (int));
if (tex)
printf ("Created texture memory\n" );
else {
printf ("Failed to malloc texture RAM\n");
exit (666);
}
return tex;
}
/*}}} */
int main ( int argc, char **argv )
{
int i, j, k, p=0;
printf ("Off we go\n" );
pixtile=create_pixmem();
texture=create_texture();
printf ("Now the big one - clearing 64x128x208 a BIT AT A TIME!\n");
for (i=0; i<128; i++ ) {
for (j=0; j<64; j++ ) {
for (k=0; k<208; k++ ) {
write_pixmem_bit ( t->array[p], k, 0 );
}
p++;
}
}
printf ("DONE !!!\n");
}
Binary file not shown.
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+74
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@@ -0,0 +1,74 @@
the smoke stuff uses the triangle function 'circle_darken' -
all opaque surfaces must have been scan-converted into pixel memory.
then, the circles can be painted using a dark airbrush.
the trick is, scan-convert the circle using
TREEltZERO_Q6, then z-compare to determine visibility
TREEltMEM_L3 and push away enable flag
ENABintoMEM (inside_circle) now, are we a 24-bit pixel?
ENABandeqMEM (pxltype) if so, darken r,g,b
ENABintoMEM (inside_and_24) save away
// now for each of r, g and b
MEMgtSCA (brightness) set enable if we can proceed with subtract
MEMpluseqSCA NB add on -darkness
ENABINV ()
ENABandeqMEM (inside_24)
CLEAR
MEMgtSCA (brightness) set enable if we can proceed with subtract
MEMpluseqSCA NB add on -darkness
ENABINV ()
ENABandeqMEM (inside_24)
CLEAR
MEMgtSCA (brightness) set enable if we can proceed with subtract
MEMpluseqSCA NB add on -darkness
ENABINV ()
ENABandeqMEM (inside_24)
CLEAR
MEMintoENAB (inside_circle) now, are we a 24-bit pixel?
ENABandeqMEMBAR (pxltype) if so, darken r,g,b
ENABintoMEM (inside_and_8) save away
// now for each of diff and spec
MEMgtSCA (brightness) set enable if we can proceed with subtract
MEMpluseqSCA NB add on -darkness
ENABINV ()
ENABandeqMEM (inside_24)
CLEAR
MEMgtSCA (brightness) set enable if we can proceed with subtract
MEMpluseqSCA NB add on -darkness
ENABINV ()
ENABandeqMEM (inside_24)
CLEAR
Note that if pixel map is arranged for diffuse and spec to inhabit r and g
// cycle count
TREEltZERO_Q6, 40
TREEltMEM_C1 40
ENABintoMEM (inside_circle) 1
// now for each of r, g and b
MEMgtSCA (brightness) 16
MEMpluseqSCA 16
ENABINV () 1
ENABandeqMEM (inside_circle) 1
CLEAR 8
MEMgtSCA (brightness) 16
MEMpluseqSCA 16
ENABINV () 1
ENABandeqMEM (inside_circle) 1
CLEAR 8
MEMintoENAB (inside_circle) 1
ENABandeqMEM (pxltype) 1
ENABintoMEM (inside_24) 1
MEMgtSCA (brightness) 16
MEMpluseqSCA 16
ENABINV () 1
ENABandeqMEM (inside_24) 1
CLEAR 8
+142
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@@ -0,0 +1,142 @@
,*(int*)p++ = P_RMODEON()
,*(int*)p++ = P_RMODEOFF()
,*(int*)p++ = P_NOOP2()
,*(int*)p++ = P_FBITS(VAL)
,*(int*)p++ = P_SCMEMA(LSB,LEN,ADDR)\
,*(int*)p++ = P_SCMEMA(LSB,LEN,ADDR)\
,*(int*)p++ = P_SCMEMA(LSB,LEN,ADDR)\
,*(int*)p++ = P_SCMEMA(LSB,LEN,ADDR)
,*(int*)p++ = P_SCMEMA(LSB,LEN,ADDR)\
,*(int*)p++ = P_SCMEMA(LSB,LEN,ADDR)\
,*(int*)p++ = P_SCMEMA(LSB,LEN,ADDR)
,*(int*)p++ = P_SCMEMA(LSB,LEN,ADDR)\
,*(int*)p++ = P_SCMEMA(LSB,LEN,ADDR)
,*(int*)p++ = P_MEMgeMEM(DST,SRC,LEN)
,*(int*)p++ = P_MEM2geMEM2(DST,SRC,LEN)
,*(int*)p++ = P_MEMgtMEM(DST,SRC,LEN)
,*(int*)p++ = P_MEM2gtMEM2(DST,SRC,LEN)
,*(int*)p++ = P_MEMeqMEM(DST,SRC,LEN)
,*(int*)p++ = P_MEMneMEM(DST,SRC,LEN)
,*(int*)p++ = P_CPY(DST,SRC,LEN)
,*(int*)p++ = P_SWAP(DST,SRC,LEN)
,*(int*)p++ = P_MEMpluseqSCA(DST,SRC,DLEN)\
,*(int*)p++ = P_MEMpluseqSCA(DST,SRC,DLEN)
,*(int*)p++ = P_MEMpluseqSCA(DST,SRC,DLEN)\
,*(int*)p++ = P_MEMpluseqTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMpluseqTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMpluseqTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMpluseqTREE(DST,SRC,LEN)
,*(int*)p++ = P_MEMpluseqTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMpluseqTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMpluseqTREE(DST,SRC,LEN)
,*(int*)p++ = P_MEMpluseqTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMpluseqTREE(DST,SRC,LEN)
,*(int*)p++ = P_TREEminusMEM(DST,SRC,LEN)\
,*(int*)p++ = P_TREEminusMEM(DST,SRC,LEN)\
,*(int*)p++ = P_TREEminusMEM(DST,SRC,LEN)\
,*(int*)p++ = P_TREEminusMEM(DST,SRC,LEN)
,*(int*)p++ = P_TREEminusMEM(DST,SRC,LEN)\
,*(int*)p++ = P_TREEminusMEM(DST,SRC,LEN)\
,*(int*)p++ = P_TREEminusMEM(DST,SRC,LEN)
,*(int*)p++ = P_TREEminusMEM(DST,SRC,LEN)\
,*(int*)p++ = P_TREEminusMEM(DST,SRC,LEN)
,*(int*)p++ = P_MEMplusMEM(DST,LSRC,SRC,DLEN,SLEN)
,*(int*)p++ = P_MEMpluseqMEM(DST,SRC,DLEN,SLEN)
,*(int*)p++ = P_MEMminusMEM(DST,LSRC,SRC,DLEN,SLEN)
,*(int*)p++ = P_MEMminuseqMEM(DST,SRC,DLEN,SLEN)
,*(int*)p++ = P_MEMplusMEM2(DST,LSRC,SRC,DLEN,SLEN)
,*(int*)p++ = P_MEMpluseqMEM2(DST,SRC,DLEN,SLEN)
,*(int*)p++ = P_MEMminusMEM2(DST,LSRC,SRC,DLEN,SLEN)
,*(int*)p++ = P_MEMminuseqMEM2(DST,SRC,DLEN,SLEN)
,*(int*)p++ = P_INVERT(DST,SRC,LEN)
,*(int*)p++ = P_NEGATE(DST,SRC,LEN)
,*(int*)p++ = P_MEMandMEM(DST,LSRC,SRC,LEN)
,*(int*)p++ = P_MEMandeqMEM(DST,SRC,LEN)
,*(int*)p++ = P_MEMorMEM(DST,LSRC,SRC,LEN)
,*(int*)p++ = P_MEMoreqMEM(DST,SRC,LEN)
,*(int*)p++ = P_MEMxorMEM(DST,LSRC,SRC,LEN)
,*(int*)p++ = P_MEMxoreqMEM(DST,SRC,LEN)
,*(int*)p++ = P_SHIFTR(DST,SRC,DLEN,SLEN,BITS)
,*(int*)p++ = P_SHIFTL(DST,SRC,LEN,BITS)
,*(int*)p++ = P_INC(DST,SRC,LEN)
,*(int*)p++ = P_DEC(DST,SRC,LEN)
,*(int*)p++ = P_MEMandTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMandTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMandTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMandTREE(DST,SRC,LEN)
,*(int*)p++ = P_MEMandTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMandTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMandTREE(DST,SRC,LEN)
,*(int*)p++ = P_MEMandTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMandTREE(DST,SRC,LEN)
,*(int*)p++ = P_MEMxorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMxorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMxorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMxorTREE(DST,SRC,LEN)
,*(int*)p++ = P_MEMxorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMxorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMxorTREE(DST,SRC,LEN)
,*(int*)p++ = P_MEMxorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMxorTREE(DST,SRC,LEN)
,*(int*)p++ = P_MEMorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMorTREE(DST,SRC,LEN)
,*(int*)p++ = P_MEMorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMorTREE(DST,SRC,LEN)
,*(int*)p++ = P_MEMorTREE(DST,SRC,LEN)\
,*(int*)p++ = P_MEMorTREE(DST,SRC,LEN)
,*(int*)p++ = P_OVFIX(DST,LEN,ADDR)
,*(int*)p++ = P_STRIPEDGE(ENAB_MASK,STRIP_MASK)\
,*(int*)p++ = P_STRIPEDGE(ENAB_MASK,STRIP_MASK)\
,*(int*)p++ = P_STRIPEDGE(ENAB_MASK,STRIP_MASK)\
,*(int*)p++ = P_STRIPEDGE(ENAB_MASK,STRIP_MASK)
,*(int*)p++ = P_STRIPEDGE(ENAB_MASK,STRIP_MASK)\
,*(int*)p++ = P_STRIPEDGE(ENAB_MASK,STRIP_MASK)\
,*(int*)p++ = P_STRIPEDGE(ENAB_MASK,STRIP_MASK)
,*(int*)p++ = P_STRIPEDGE(ENAB_MASK,STRIP_MASK)\
,*(int*)p++ = P_STRIPEDGE(ENAB_MASK,STRIP_MASK)
,*(int*)p++ = P_SENDSTATUS(ID)\
,*(int*)p++ = P_SENDSTATUS(ID)
,*(int*)p++ = P_SENDSTATUS(ID)\
,*(int*)p++ = P_TBLENTRY(ENTRY,INDEX,ELEN,ILEN)\
,*(int*)p++ = P_TBLENTRY(ENTRY,INDEX,ELEN,ILEN)
,*(int*)p++ = P_TBLENTRY(ENTRY,INDEX,ELEN,ILEN)\
,*(int*)p++ = P_GMAX(DST,SRC,LEN,TMP)
,*(int*)p++ = P_GMIN(DST,SRC,LEN,TMP)
,*(int*)p++ = P_MEM2clmppluseqMEM2(DST,SRC,DLEN,TMP)
,*(int*)p++ = P_TREEclmpintoMEM(DST,LEN)\
,*(int*)p++ = P_TREEclmpintoMEM(DST,LEN)\
,*(int*)p++ = P_TREEclmpintoMEM(DST,LEN)\
,*(int*)p++ = P_TREEclmpintoMEM(DST,LEN)
,*(int*)p++ = P_TREEclmpintoMEM(DST,LEN)\
,*(int*)p++ = P_TREEclmpintoMEM(DST,LEN)\
,*(int*)p++ = P_TREEclmpintoMEM(DST,LEN)
,*(int*)p++ = P_TREEclmpintoMEM(DST,LEN)\
,*(int*)p++ = P_TREEclmpintoMEM(DST,LEN)
,*(int*)p++ = P_MASKBITCLEAR(DST,SRC,SLEN)\
,*(int*)p++ = P_MASKBITCLEAR(DST,SRC,SLEN)
,*(int*)p++ = P_MASKBITCLEAR(DST,SRC,SLEN)\
,*(int*)p++ = P_MEMgtSCA(SRC,SLEN)\
,*(int*)p++ = P_MEMgtSCA(SRC,SLEN)
,*(int*)p++ = P_MEMgtSCA(SRC,SLEN)\
,*(int*)p++ = P_MEMgeSCA(SRC,SLEN)\
,*(int*)p++ = P_MEMgeSCA(SRC,SLEN)
,*(int*)p++ = P_MEMgeSCA(SRC,SLEN)\
,*(int*)p++ = P_WRTSUBPIX(MASKBIT,DST,SRC,SLEN,LEN)\
,*(int*)p++ = P_WRTSUBPIX(MASKBIT,DST,SRC,SLEN,LEN)
,*(int*)p++ = P_WRTSUBPIX(MASKBIT,DST,SRC,SLEN,LEN)\
,*(int*)p++ = P_MUMBLE(LSB,LEN,ENAB)\
,*(int*)p++ = P_MUMBLE(LSB,LEN,ENAB)
,*(int*)p++ = P_MUMBLE(LSB,LEN,ENAB)\
,*(int*)p++ = P_MEMclmppluseqMEM(DST,SRC,DLEN,TMP)
,*(int*)p++ = P_SPLAT(DST,LEN,TMP)\
,*(int*)p++ = P_SPLAT(DST,LEN,TMP)\
,*(int*)p++ = P_SPLAT(DST,LEN,TMP)\
,*(int*)p++ = P_SPLAT(DST,LEN,TMP)
,*(int*)p++ = P_SPLAT(DST,LEN,TMP)\
,*(int*)p++ = P_SPLAT(DST,LEN,TMP)\
,*(int*)p++ = P_SPLAT(DST,LEN,TMP)
,*(int*)p++ = P_SPLAT(DST,LEN,TMP)\
,*(int*)p++ = P_SPLAT(DST,LEN,TMP)
+36
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@@ -0,0 +1,36 @@
static int statint=0;
static float statfloat=0.0f;
void intintint ( int a, int b, int c )
{
register int d, e, f;
d=a;
e=b;
f=c;
statint=(d+e+f)*(a+b-c);
}
void floatfloatfloat ( float a, float b, float c )
{
register float d, e, f;
d=a;
e=b;
f=c;
statfloat=(d+e+f)*(a+b-c);
}
void floatintfloat ( float a, int b, float c )
{
float d, e, f;
d=a;
e=b;
f=c;
floatfloatfloat ( d, e, f );
intintint ( a, b, f );
}
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+180
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@@ -0,0 +1,180 @@
.file "test.c"
// PGC Rel 2.0a -opt 2
.text
.globl _intintint
.align 8
_intintint:
.a1 = 0
.f1 = 32
orh h%.STACK+.f1-16, r0, r28
or l%.STACK+.f1-16, r28, r28
// lineno: 8
adds r16, r17, r29
adds r29, r18, r30
ixfr r30, f16
adds r17, r16, r19
subs r19, r18, r20
ixfr r20, f18
st.l r17, -4(r28)
st.l r18, -8(r28)
fmlow.dd f18, f16, f20
orh ha%_statint, r0, r31
bri r1
fst.l f20, l%_statint(r31)
// lineno: 13
bri r1
nop
.globl _floatfloatfloat
.align 8
_floatfloatfloat:
.a2 = 0
.f2 = 32
orh h%.STACK+.f2-16, r0, r28
or l%.STACK+.f2-16, r28, r28
// lineno: 19
fadd.ss f9, f8, f16
fadd.ss f10, f16, f17
fadd.ss f8, f9, f18
fsub.ss f18, f10, f19
fmul.ss f19, f17, f20
orh ha%_statfloat, r0, r31
fst.l f20, l%_statfloat(r31)
fst.l f9, -4(r28)
bri r1
fst.l f10, -8(r28)
// lineno: 24
bri r1
nop
.globl _floatintfloat
.align 8
_floatintfloat:
.a3 = 80
.f3 = 32
addu -(.a3+.f3), sp, sp
st.l fp,(.f3-16)(sp)
addu (.f3-16), sp, fp
st.l r1, 4(fp)
st.l r16, 48(fp)
fst.l f8, 16(fp)
// lineno: 30
orh ha%.C00094, r0, r31
fld.d l%.C00094(r31), f16
xorh 0x8000, r16, r28
ixfr r28, f18
fiadd.ss f17, f0, f19
fsub.dd f18, f16, f20
fmov.ds f20, f22
fiadd.ss f9, f0, f23
fiadd.ss f22, f0, f9
fiadd.ss f23, f0, f10
fst.l f22, -4(fp)
call _floatfloatfloat
fst.l f23, -8(fp)
fld.l 16(fp), f16
ld.l 48(fp), r17
fld.l -8(fp), f17
ftrunc.sd f16, f18
fxfr f18, r16
ftrunc.sd f17, f20
call _intintint
fxfr f20, r18
// lineno: 36
adds .a3+16, fp, r31
ld.l 4(fp), r1
ld.l 0(fp), fp
bri r1
mov r31, sp
.data
.align 8
.C00094: // (0)
.long 0x80000000, 0x43300000 // 4.50360177485414400E+15
.data
.align 4
_statint: //statint
.long 0
_statfloat: //statfloat
.long 0x0 // 0.00000000E+00
.lcomm .STACK,32
+8
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@@ -0,0 +1,8 @@
Off we go
Starting - t empty
bit 0 now 1 should be 1
bit 0 now 1 should be 0
bit 10 now 1 should be 0
and bit 0 now 1
about to write 7 sig bits of -11 into bit 29
and read back 2147483647
+33
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@@ -0,0 +1,33 @@
f ..\..\unc\igc\igc_opcd.h
f divpxmap.h
f dmaengn.h
f pxpl5asm.h
f pxpl5tri.h
f pxpl5typ.h
f pxplmacr.h
f pxpl5asm.ss
f pxpl5tri.ss
f pxpl5opt.s
f pxpl5tst.c
f pxpl5tri.c
f pxpl5sup.c
f header.ss
f footer.ss
f makefile
zmake pxpl5opt.s
zmake pxpl5tst.860
run860 pxpl5tst.860
drun860 pxpl5tst.860
disassem 1ca08005
nm860 -ox pxpl5tst.860 > dump
f triangle.dmp
copy dump triangle.dmp
f dump
+185
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@@ -0,0 +1,185 @@
Booting root transputer...ok
trunc test
pxpl5tst is go
create_screenbins, 1024 by 512
grabbing screen0bins
grabbing screen1bins
created screenbins
Gosh golly gee - 25000 triangles pxpl5ized in 0.361266 ticks (69201.109375 per sec)
Trace regs preplanarized
r 1= 0xfff82074 r 2= 0x838ffaf8 r 3= 0x838fff90
r 4= 0x 0 r 5= 0x838ffb8c r 6= 0xffffebf0 r 7= 0x83612f18
r 8= 0x836131e8 r 9= 0x83613b48 r10= 0x800ffff0 r11= 0x800ffff0
r12= 0x83612810 r13= 0x83613c20 r14= 0x800ffff0 r15= 0x800ffff0
r16= 0x838ffb90 r17= 0x 0 r18= 0x83612f18 r19= 0x836131e8
r20= 0x83613b48 r21= 0x 0 r22= 0xffffebf0 r23= 0x 0
r24= 0xfffffffe r25= 0x 5 r26= 0xffffe81e r27= 0x 0
r28= 0x800061a8 r29= 0x838ff9c4 r30= 0x83607495 r31= 0x83600000
f 2= 3.0099 f 3= 2.6486 f 4= 0.0001 f 5= 0.0000
f 6= -0.0000 f 7= 0.0000 f 8= 12.0000 f 9= 22.0000
f10= 42.0000 f11= 62.0000 f12= 32.0000 f13= 32.0000
f14= 42.0000 f15= 22.0000 f16= 12.0000 f17= 62.0000
f18= 0.0001 f19= 2.5625 f20= -30.0000 f21= 20.0000
f22= 10.0000 f23= 0.00000 f24= 0.00000 f25= 1.2679
f26= 0.00000 f27= 1.8750 f28= 169808876461523000000000000000000000000.0000 f29= 2.0000
f30= 2.0000 f31= 339617752923046000000000000000000000000.0000
Trace regs edgized triangle
r 1= 0xfff820a4 r 2= 0x838ffaf8 r 3= 0x838fff90
r 4= 0x 0 r 5= 0x838ffbbc r 6= 0xffffebf0 r 7= 0x83612f18
r 8= 0x836131e8 r 9= 0x83613b48 r10= 0x800ffff0 r11= 0x800ffff0
r12= 0x83612810 r13= 0x83613c20 r14= 0x800ffff0 r15= 0x800ffff0
r16= 0x 603 r17= 0x 0 r18= 0x83612f18 r19= 0x836131e8
r20= 0x83613b48 r21= 0x 0 r22= 0xffffebf0 r23= 0x 0
r24= 0xfffffffe r25= 0x 5 r26= 0xffffe81e r27= 0x 0
r28= 0x800061a8 r29= 0x838ff9c4 r30= 0x83607495 r31= 0x838ffb8c
f 2= 3.0099 f 3= 2.6486 f 4= 1984.0000 f 5= 0.0000
f 6= -0.0000 f 7= 0.0000 f 8= 12.0000 f 9= 22.0000
f10= 42.0000 f11= 62.0000 f12= 32.0000 f13= 32.0000
f14= 42.0000 f15= 22.0000 f16= 12.0000 f17= 62.0000
f18= 0.0001 f19= 2.5625 f20= -30.0000 f21= 20.0000
f22= 10.0000 f23= 0.00000 f24= 0.00000 f25= 1.2679
f26= 0.00000 f27= 264.0000 f28= 640.0000 f29= -2340.0000
f30= 1600.0000 f31= 1344.0000
Trace regs zbuffered triangle
r 1= 0xfff820d4 r 2= 0x838ffaf8 r 3= 0x838fff90
r 4= 0x 0 r 5= 0x838ffbcc r 6= 0xffffebf0 r 7= 0x83612f18
r 8= 0x836131e8 r 9= 0x83613b48 r10= 0x800ffff0 r11= 0x800ffff0
r12= 0x83612810 r13= 0x83613c20 r14= 0x800ffff0 r15= 0x800ffff0
r16= 0x 616 r17= 0x 18 r18= 0x83612f18 r19= 0x836131e8
r20= 0x83613b48 r21= 0x 0 r22= 0xffffebf0 r23= 0x 0
r24= 0xfffffffe r25= 0x 5 r26= 0xffffe81e r27= 0x 0
r28= 0x800061a8 r29= 0x838ff9c4 r30= 0x83607495 r31= 0xfff820b4
f 2= 3.0099 f 3= 2.6486 f 4= 2684.0000 f 5= 0.0000
f 6= -0.0000 f 7= 0.0000 f 8= 12.0000 f 9= 22.0000
f10= 42.0000 f11= 62.0000 f12= 32.0000 f13= 32.0000
f14= 42.0000 f15= 22.0000 f16= 12.0000 f17= 62.0000
f18= 0.0001 f19= 2.5625 f20= -30.0000 f21= 20.0000
f22= 10.0000 f23= 0.00000 f24= 122.0000 f25= 38.0000
f26= 822.0000 f27= 26304.0000 f28= 0.00000 f29= 0.00000
f30= -0.00000 f31= -812.0000
Trace regs planarized something
r 1= 0xfff82108 r 2= 0x838ffaf8 r 3= 0x838fff90
r 4= 0x 0 r 5= 0x838ffbdc r 6= 0xffffebf0 r 7= 0x83612f18
r 8= 0x836131e8 r 9= 0x83613b48 r10= 0x800ffff0 r11= 0x800ffff0
r12= 0x83612810 r13= 0x83613c20 r14= 0x800ffff0 r15= 0x800ffff0
r16= 0x 666 r17= 0x 1c r18= 0x83612f18 r19= 0x836131e8
r20= 0x83613b48 r21= 0x 0 r22= 0xffffebf0 r23= 0x 0
r24= 0xfffffffe r25= 0x 5 r26= 0xffffe81e r27= 0x 0
r28= 0x800061a8 r29= 0x838ff9c4 r30= 0x83607495 r31= 0xfff820b4
f 2= 3.0099 f 3= 2.6486 f 4= 22.0000 f 5= 0.0000
f 6= -0.0000 f 7= 0.0000 f 8= 12.0000 f 9= 22.0000
f10= 42.0000 f11= 62.0000 f12= 32.0000 f13= 32.0000
f14= 42.0000 f15= 22.0000 f16= 12.0000 f17= 62.0000
f18= 0.0001 f19= 2.5625 f20= -30.0000 f21= 20.0000
f22= 10.0000 f23= 0.00000 f24= 1.0000 f25= 1.0000
f26= 1.0000 f27= 32.0000 f28= 0.00000 f29= -0.00000
f30= -0.00000 f31= -42.0000
Trace regs planarized something
r 1= 0xfff8213c r 2= 0x838ffaf8 r 3= 0x838fff90
r 4= 0x 0 r 5= 0x838ffbec r 6= 0xffffebf0 r 7= 0x83612f18
r 8= 0x836131e8 r 9= 0x83613b48 r10= 0x800ffff0 r11= 0x800ffff0
r12= 0x83612810 r13= 0x83613c20 r14= 0x800ffff0 r15= 0x800ffff0
r16= 0x 667 r17= 0x 20 r18= 0x83612f18 r19= 0x836131e8
r20= 0x83613b48 r21= 0x 0 r22= 0xffffebf0 r23= 0x 0
r24= 0xfffffffe r25= 0x 5 r26= 0xffffe81e r27= 0x 0
r28= 0x800061a8 r29= 0x838ff9c4 r30= 0x83607495 r31= 0xfff820b4
f 2= 3.0099 f 3= 2.6486 f 4= 0.00000 f 5= 0.0000
f 6= -0.0000 f 7= 0.0000 f 8= 12.0000 f 9= 22.0000
f10= 42.0000 f11= 62.0000 f12= 32.0000 f13= 32.0000
f14= 42.0000 f15= 22.0000 f16= 12.0000 f17= 62.0000
f18= 0.0001 f19= 2.5625 f20= -30.0000 f21= 20.0000
f22= 10.0000 f23= 0.00000 f24= 0.00000 f25= 0.00000
f26= 0.00000 f27= 0.00000 f28= 0.00000 f29= 0.00000
f30= 0.00000 f31= 0.00000
Trace regs planarized something
r 1= 0xfff82170 r 2= 0x838ffaf8 r 3= 0x838fff90
r 4= 0x 0 r 5= 0x838ffbfc r 6= 0xffffebf0 r 7= 0x83612f18
r 8= 0x836131e8 r 9= 0x83613b48 r10= 0x800ffff0 r11= 0x800ffff0
r12= 0x83612810 r13= 0x83613c20 r14= 0x800ffff0 r15= 0x800ffff0
r16= 0x 668 r17= 0x 24 r18= 0x83612f18 r19= 0x836131e8
r20= 0x83613b48 r21= 0x 0 r22= 0xffffebf0 r23= 0x 0
r24= 0xfffffffe r25= 0x 5 r26= 0xffffe81e r27= 0x 0
r28= 0x800061a8 r29= 0x838ff9c4 r30= 0x83607495 r31= 0xfff820b4
f 2= 3.0099 f 3= 2.6486 f 4= 22.0000 f 5= 0.0000
f 6= -0.0000 f 7= 0.0000 f 8= 12.0000 f 9= 22.0000
f10= 42.0000 f11= 62.0000 f12= 32.0000 f13= 32.0000
f14= 42.0000 f15= 22.0000 f16= 12.0000 f17= 62.0000
f18= 0.0001 f19= 2.5625 f20= -30.0000 f21= 20.0000
f22= 10.0000 f23= 0.00000 f24= 1.0000 f25= 1.0000
f26= 1.0000 f27= 32.0000 f28= 0.00000 f29= -0.00000
f30= -0.00000 f31= -42.0000
Trace regs planarized something
r 1= 0xfff821b0 r 2= 0x838ffaf8 r 3= 0x838fff90
r 4= 0x 0 r 5= 0x838ffc0c r 6= 0xffffebf0 r 7= 0x83612f18
r 8= 0x836131e8 r 9= 0x83613b48 r10= 0x800ffff0 r11= 0x800ffff0
r12= 0x83612810 r13= 0x83613c20 r14= 0x800ffff0 r15= 0x800ffff0
r16= 0x 669 r17= 0x c r18= 0x83614328 r19= 0x836145f8
r20= 0x83614f58 r21= 0x 0 r22= 0xffffebf0 r23= 0x 0
r24= 0xfffffffe r25= 0x 5 r26= 0xffffe81e r27= 0x 0
r28= 0x800061a8 r29= 0x838ff9c4 r30= 0x83607495 r31= 0xfff820b4
f 2= 3.0099 f 3= 2.6486 f 4= 0.00000 f 5= 0.0000
f 6= -0.0000 f 7= 0.0000 f 8= 12.0000 f 9= 22.0000
f10= 42.0000 f11= 62.0000 f12= 32.0000 f13= 32.0000
f14= 42.0000 f15= 22.0000 f16= 12.0000 f17= 62.0000
f18= 0.0001 f19= 2.5625 f20= -30.0000 f21= 20.0000
f22= 10.0000 f23= 0.00000 f24= 0.00000 f25= 0.00000
f26= 0.00000 f27= 0.00000 f28= 0.00000 f29= 0.00000
f30= 0.00000 f31= 0.00000
Trace regs planarized something
r 1= 0xfff821e4 r 2= 0x838ffaf8 r 3= 0x838fff90
r 4= 0x 0 r 5= 0x838ffc1c r 6= 0xffffebf0 r 7= 0x83612f18
r 8= 0x836131e8 r 9= 0x83613b48 r10= 0x800ffff0 r11= 0x800ffff0
r12= 0x83612810 r13= 0x83613c20 r14= 0x800ffff0 r15= 0x800ffff0
r16= 0x 670 r17= 0x 10 r18= 0x83614328 r19= 0x836145f8
r20= 0x83614f58 r21= 0x 0 r22= 0xffffebf0 r23= 0x 0
r24= 0xfffffffe r25= 0x 5 r26= 0xffffe81e r27= 0x 0
r28= 0x800061a8 r29= 0x838ff9c4 r30= 0x83607495 r31= 0xfff820b4
f 2= 3.0099 f 3= 2.6486 f 4= 0.00000 f 5= 0.0000
f 6= -0.0000 f 7= 0.0000 f 8= 12.0000 f 9= 22.0000
f10= 42.0000 f11= 62.0000 f12= 32.0000 f13= 32.0000
f14= 42.0000 f15= 22.0000 f16= 12.0000 f17= 62.0000
f18= 0.0001 f19= 2.5625 f20= -30.0000 f21= 20.0000
f22= 10.0000 f23= 0.00000 f24= 0.00000 f25= 0.00000
f26= 0.00000 f27= 0.00000 f28= 0.00000 f29= 0.00000
f30= 0.00000 f31= 0.00000
Dump of equation memory
memory[0] - 0x0 (0.0000000)
memory[1] - 0x40000000 (2.000000)
memory[2] - 0x41200000 (10.000000)
memory[3] - 0x44200000 (640.000000)
memory[4] - 0x602 (0.000001)
memory[5] - 0x41200000 (10.000000)
memory[6] - 0xc2200000 (-40.000000)
memory[7] - 0xc5124000 (-2340.000000)
memory[8] - 0x603 (0.000001)
memory[9] - 0xc2200000 (-40.000000)
memory[10] - 0x41a00000 (20.000000)
memory[11] - 0x0 (0.0000000)
memory[12] - 0x616 (0.000001)
memory[13] - 0x0 (0.0000000)
memory[14] - 0x0 (0.0000000)
memory[15] - 0x80000000 (-0.0000000)
memory[16] - 0x666 (0.000001)
memory[17] - 0x80000000 (-0.0000000)
memory[18] - 0x0 (0.0000000)
memory[19] - 0x80000000 (-0.0000000)
memory[20] - 0x667 (0.000001)
memory[21] - 0x0 (0.0000000)
memory[22] - 0x0 (0.0000000)
memory[23] - 0x0 (0.0000000)
memory[24] - 0x668 (0.000001)
memory[25] - 0x80000000 (-0.0000000)
memory[26] - 0x0 (0.0000000)
memory[27] - 0x80000000 (-0.0000000)
memory[28] - 0x669 (0.000001)
memory[29] - 0x0 (0.0000000)
memory[30] - 0x0 (0.0000000)
memory[31] - 0x0 (0.0000000)
memory[32] - 0x670 (0.000001)
memory[33] - 0x0 (0.0000000)
memory[34] - 0x0 (0.0000000)
memory[35] - 0x0 (0.0000000)
memory[36] - 0x0 (0.0000000)
memory[37] - 0x0 (0.0000000)
memory[38] - 0x0 (0.0000000)
memory[39] - 0x0 (0.0000000)
+30
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@@ -0,0 +1,30 @@
#ifdef EVAT /* executing on the EVAT */
#include <sys/types.h>
#include <sys/times.h>
#define HZ 150
struct tms mybuffer;
float second_()
{
times (&mybuffer);
return ((double) mybuffer.tms_utime / HZ);
}
#else
static float lastTime = 0.0;
float second_()
{
/*we've got a 1 usec timer*/
float time =(float)times(0) / 1000000.0;
/*check for wrap arround, every 2^32 usecs */
if ( time < lastTime)
time +=4294.967295;
lastTime = time;
return time;
}
#endif /* which host */
Binary file not shown.
+97
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@@ -0,0 +1,97 @@
.file "walltime.c"
// PGC Rel 2.0a -opt 4
.text
.globl _second_
.align 8
_second_:
.a1 = 0
.f1 = 32
addu -(.a1+.f1), sp, sp
st.l fp,(.f1-16)(sp)
addu (.f1-16), sp, fp
st.l r1, 4(fp)
fst.d f2, -8(fp)
// lineno: 0
// lineno: 22
call _times
mov r0, r16
orh ha%.C00060, r0, r31
fld.d l%.C00060(r31), f16
xorh 0x8000, r16, r28
ixfr r28, f18
fiadd.ss f17, f0, f19
fsub.dd f18, f16, f20
orh ha%.C00062, r0, r31
fld.d l%.C00062(r31), f26
fmov.ds f20, f22
orh ha%_lastTime, r0, r31
fld.l l%_lastTime(r31), f30
fmov.sd f22, f24
fmul.dd f24, f26, f28
fmov.ds f28, f2
pfle.ss f30, f2, f0
bnc .B55
orh ha%.C00056, r0, r31
fld.d l%.C00056(r31), f8
fmov.sd f2, f10
fadd.dd f10, f8, f12
fmov.ds f12, f2
// lineno: 27
.B55: //.B0000
orh ha%_lastTime, r0, r31
.DB.B5555:
fst.l f2, l%_lastTime(r31)
fiadd.ss f2, f0, f8
// lineno: 0
// lineno: 29
fld.d -8(fp), f2
adds .a1+16, fp, r31
ld.l 4(fp), r1
ld.l 0(fp), fp
bri r1
mov r31, sp
.data
.align 8
.C00060: // (0)
.long 0x80000000, 0x43300000 // 4.50360177485414400E+15
.C00062: // (8)
.long 0xa0b5ed8d, 0x3eb0c6f7 // 9.99999999999999955E-07
.C00056: // (16)
.long 0xa0a52696, 0x40b0c6f7 // 4.29496729500000038E+03
.data
.align 4
_lastTime: //lastTime
.long 0x0 // 0.00000000E+00
.extern _times
+3
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@@ -0,0 +1,3 @@
y:\control\gt860el\pgi\bin\pgc pxpl5tst.c -x 50 -stdinc y:\control\gt860el\pgi\include -astype 1 -def i860 -opt 2 -asm pxpl5tst.s
--- errorlevel 1