125000 bench: RX overrun confirmed (NAK=1082, lamps dead) — CPU is the wall

Board->PC near-perfect at 125k (framing 5) while PC->board shredded by
packet length (2-byte polls 60% delivered, 4-byte lamp cmds ~2/3 NAKed
as checksum-corrupt): the 2MHz HC11 RX ISR can't drain back-to-back
bytes at 80us. MAX232 acquitted; zero wedges even at 40% inbound loss.
62500 image built as the sweet-spot candidate (RIOv4_2_patched_62500.bin).

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>

RIOv4_2-ANALYSIS.md

@@ -304,3 +304,17 @@ just survivable. To actually harvest the bandwidth, the next dial is
 host-side: drop the 55ms analog poll interval (the board now answers in
 ~4.6ms of wire time). Cabinet adoption still gated on game-side baud
 patches; 9600 patched chip remains the production standard meanwhile.
+
+### 125000 bench results (2026-07-18) — CPU wall found; RX overrun confirmed
+
+`testlogs/riomash-patched-125000-20260718-125310.log` (103s): zero wedges
+(all gaps self-recovered <=0.52s even here), but the board's RX drowns:
+NAK=1082 (~2/3 of the ~1650 lamp commands arrived checksum-corrupt —
+overrun-dropped bytes; lamps visibly dead), analog delivery 60.6% (2-byte
+requests survive better than 4-byte packets), both status exchanges
+failed. Direction asymmetry nails the cause: board->PC was near-perfect
+(framing 5), so the MAX232 leg is fine at 125k — the 2MHz HC11 RX ISR
+(~160 E-cycles/byte, 1-byte buffer) is the wall, exactly as the cycle
+estimate predicted. Verdict: 125000 NOT viable. Sweet-spot candidate:
+`RIOv4_2_patched_62500.bin` (320 cycles/byte, MAX232 in-spec, ACK-wait
+80 ticks = 12.8ms), sha256 below, awaiting bench.