#ifndef DMAengn_h
#define DMAengn_h

#define DMA_GOTO_VAL   0x00000000
#define DMA_SEND_VAL   0x10000000
#define DMA_SENDE_VAL  0x90000000
#define DMA_TILE_VAL   0x20000000
#define DMA_TXDN_VAL   0x30000000
#define DMA_RETE_VAL   0x70000000
#define DMA_STOP_VAL   0xf0000000
#define DMA_FLUSH_VAL  0x60000000
#define DMA_WAIT_VAL   0x80000000

#define DMA_CMD_MASK   0xf0000000
#define DMA_SIZE_MASK  0x7f

#define DMA_GOTO        (DMA_GOTO_VAL)
#define DMA_SEND(size)  (DMA_SEND_VAL|(size))
#define DMA_SENDE(size) (DMA_SENDE_VAL|(size))
#define DMA_TILE        (DMA_TILE_VAL)
#define DMA_TXDN        (DMA_TXDN_VAL)
#define DMA_RETE(cpu)   (DMA_RETE_VAL|((cpu)<<28))
#define DMA_STOP(cpu)   (DMA_STOP_VAL|((cpu)<<28))
#define DMA_FLUSH       (DMA_FLUSH_VAL)
#define DMA_WAIT        (DMA_WAIT_VAL)

#define DMAop_0(reg,op) \
or  (op())&0xffff, r0, reg; \
orh ((op())>>16)&0xffff, reg, reg

#define DMAop_1(reg,op,a) \
or  (op(a))&0xffff, r0, reg; \
orh ((op(a))>>16)&0xffff, reg, reg

#define DMAsend_reg(destreg,countreg) \
shl r0, r0, destreg; \
orh (DMA_SEND_VAL >> 16), destreg, destreg; \
or countreg, destreg, destreg

#define DMAsend_poly(destreg,coeff0, coeffptr) \
adds 7, coeffptr, r31;  \
subs r31, coeff0, r31;  \
shl  3, r31, destreg;   \
orh (DMA_SEND_VAL >> 16), destreg, destreg

#endif