CydandClaude Fable 5
fdd9ac9d97
Archival snapshot of the Virtual World Entertainment Tesla cockpit software, 1994-1996: MUNGA engine and L4 pod layer source (Borland C++ 5.0), BT/RP game code, and game content (models, audio, maps, gauges, Division renderer data). Includes third-party libraries: Division dVS/DPL graphics, HMI SOS audio, WATTCP networking. Files are preserved byte-for-byte (.gitattributes disables all line-ending conversion). README.md documents the layout, target hardware, and toolchain. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
267 lines
10 KiB
PHP
267 lines
10 KiB
PHP
;===========================================================================
|
|
; File: PCSERIAL.INC
|
|
; Project: MUNGA
|
|
; Contents: PC serial interface equates (TASM)
|
|
;---------------------------------------------------------------------------
|
|
; Date Who Modification
|
|
; -------- --- -----------------------------------------------------------
|
|
; 01/04/95 CPB Initial coding
|
|
;---------------------------------------------------------------------------
|
|
; Copyright (C) 1994, Virtual World Entertainment, Inc.
|
|
; All Rights reserved worldwide
|
|
; This unpublished sourcecode is PROPRIETARY and CONFIDENTIAL
|
|
;===========================================================================
|
|
|
|
;
|
|
; UART register definitions
|
|
;
|
|
; --- LSR bit low
|
|
UART_DATA EQU 0 ;Transmitter holding/receiver data register
|
|
UART_IER EQU 1 ;Interrupt enable register
|
|
; --- LSR bit high
|
|
UART_BRDL EQU 0 ;Low byte, data rate divisor
|
|
UART_BRDH EQU 1 ;High byte, data rate divisor
|
|
; --- LSR bit "don't care"
|
|
UART_IIR EQU 2 ;Interrupt identification register
|
|
UART_LCR EQU 3 ;Line control register
|
|
UART_MCR EQU 4 ;Modem control register
|
|
UART_LSR EQU 5 ;Line status register
|
|
UART_MSR EQU 6 ;Modem status register
|
|
|
|
UART_COM1_BASE EQU 03F8h ;COM1 port address
|
|
UART_COM2_BASE EQU 02F8h ;COM2 port address
|
|
UART_COM3_BASE EQU 03E8h ;COM3 port address
|
|
UART_COM4_BASE EQU 02E8h ;COM4 port address
|
|
|
|
UART_300BAUD EQU 0180h ;Data rate definitions
|
|
UART_1200BAUD EQU 0060h
|
|
UART_2400BAUD EQU 0030h
|
|
UART_9600BAUD EQU 000Ch
|
|
UART_19KBAUD EQU 0006h ;19,200 Baud
|
|
UART_38KBAUD EQU 0003h ;38,400 Baud
|
|
UART_115KBAUD EQU 0001h ;115,200 Baud
|
|
|
|
UART_IER_RDR EQU 00000001b ;IER:receiver data available
|
|
UART_IER_THR EQU 00000010b ;IER:transmit hold register empty
|
|
UART_IER_LSR EQU 00000100b ;IER:data error or receipt of break
|
|
UART_IER_MSR EQU 00001000b ;IER:MSR has changed
|
|
|
|
UART_IER_RX EQU 00001101b ;IER:all internal receiver sources
|
|
UART_IER_ALL EQU 00001111b ;IER:all internal sources
|
|
|
|
UART_IIR_DONE EQU 00000001b ;IIR:zero if interrupt pending
|
|
|
|
UART_IIR_MSR EQU 00000000b ;IIR:MSR has changed
|
|
UART_IIR_THR EQU 00000010b ;IIR:THR is empty
|
|
UART_IIR_RDR EQU 00000100b ;IIR:data available in RDR
|
|
UART_IIR_LSR EQU 00000110b ;IIR:data error or receipt of break
|
|
|
|
UART_LCR_5 EQU 00000000b ;LCR:5 data bits
|
|
UART_LCR_6 EQU 00000001b ;LCR:6 data bits
|
|
UART_LCR_7 EQU 00000010b ;LCR:7 data bits
|
|
UART_LCR_8 EQU 00000011b ;LCR:8 data bits
|
|
|
|
UART_LCR_S1 EQU 00000000b ;LCR:one stop bit
|
|
UART_LCR_S2 EQU 00000100b ;LCR:1.5 stop for 5 bits, else 2 stop bits
|
|
|
|
UART_LCR_NP EQU 00000000b ;LCR:no parity
|
|
UART_LCR_OP EQU 00001000b ;LCR:odd parity
|
|
UART_LCR_EP EQU 00011000b ;LCR:even parity
|
|
UART_LCR_MP EQU 00101000b ;LCR:mark parity? (always set)
|
|
UART_LCR_SP EQU 00111000b ;LCR:space parity? (always clear)
|
|
|
|
UART_LCR_BRK EQU 01000000b ;LCR:transmit break
|
|
|
|
UART_LCR_ALT EQU 10000000b ;LCR:allows access to data rate registers
|
|
|
|
UART_MCR_DTR EQU 00000001b ;MCR:activate DTR output
|
|
UART_MCR_RTS EQU 00000010b ;MCR:activate RTS output
|
|
UART_MCR_USR EQU 00000100b ;MCR:activate user output line #1
|
|
UART_MCR_IRQ EQU 00001000b ;MCR:enable interrupts (user output line #2)
|
|
UART_MCR_LBT EQU 00010000b ;MCR:enable loopback testing
|
|
|
|
UART_LSR_RDR EQU 00000001b ;LSR:data available in RDR
|
|
UART_LSR_OE EQU 00000010b ;LSR:overrun error
|
|
UART_LSR_PE EQU 00000100b ;LSR:parity error
|
|
UART_LSR_FE EQU 00001000b ;LSR:framing error
|
|
UART_LSR_BRK EQU 00010000b ;LSR:break detect
|
|
UART_LSR_THR EQU 00100000b ;LSR:THR is empty
|
|
UART_LSR_TSR EQU 01000000b ;LSR:TSR is empty
|
|
UART_LSR_ERRS EQU UART_LSR_OE+UART_LSR_PE+UART_LSR_FE+UART_LSR_BRK
|
|
|
|
UART_MSR_DCTS EQU 00000001b ;MSR:delta CTS (CTS has changed)
|
|
UART_MSR_DDSR EQU 00000010b ;MSR:delta DSR (DSR has changed)
|
|
UART_MSR_DRI EQU 00000100b ;MSR:delta RI (RI has changed)
|
|
UART_MSR_DDCD EQU 00001000b ;MSR:delta DCD (DCD has changed)
|
|
UART_MSR_CTS EQU 00010000b ;MSR:CTS status
|
|
UART_MSR_DSR EQU 00100000b ;MSR:DSR status
|
|
UART_MSR_RI EQU 01000000b ;MSR:RI status
|
|
UART_MSR_DCD EQU 10000000b ;MSR:DCD status
|
|
|
|
;-------------------------------------------------------------------------
|
|
; ASSERT_MCR macro - asserts ("turns on") selected MCR bits
|
|
;-------------------------------------------------------------------------
|
|
; Enter:
|
|
; DX = base port address for UART
|
|
; theseBits = MCR bits to assert (see UART_MCR_... definitions, above)
|
|
;-------------------------------------------------------------------------
|
|
; Returns:
|
|
; (nothing)
|
|
;-------------------------------------------------------------------------
|
|
ASSERT_MCR MACRO theseBits
|
|
add dx,UART_MCR ;move to MCR register
|
|
in al,dx ;get contents
|
|
or al,theseBits ;turn on bit(s)
|
|
out dx,al
|
|
sub dx,UART_MCR ;restore dx
|
|
ENDM
|
|
|
|
;-------------------------------------------------------------------------
|
|
; RETRACT_MCR macro - retracts ("turns off") selected MCR bits
|
|
;-------------------------------------------------------------------------
|
|
; Enter:
|
|
; DX = base port address for UART
|
|
; theseBits = MCR bits to assert (see UART_MCR_... definitions, above)
|
|
;-------------------------------------------------------------------------
|
|
; Returns:
|
|
; (nothing)
|
|
;-------------------------------------------------------------------------
|
|
RETRACT_MCR MACRO theseBits
|
|
add dx,UART_MCR ;move to MCR register
|
|
in al,dx ;get contents
|
|
and al,NOT (theseBits) ;turn off bit(s)
|
|
out dx,al
|
|
sub dx,UART_MCR ;restore dx
|
|
ENDM
|
|
|
|
;-------------------------------------------------------------------------
|
|
; ASSERT_IER macro - asserts ("turns on") selected IER bits
|
|
;-------------------------------------------------------------------------
|
|
; Enter:
|
|
; DX = base port address for UART
|
|
; theseBits = MCR bits to assert (see UART_IER_... definitions, above)
|
|
;-------------------------------------------------------------------------
|
|
; Returns:
|
|
; (nothing)
|
|
;-------------------------------------------------------------------------
|
|
ASSERT_IER MACRO theseBits
|
|
add dx,UART_IER ;move to IER register
|
|
in al,dx ;get contents
|
|
or al,theseBits ;turn on bit(s)
|
|
out dx,al
|
|
sub dx,UART_IER ;restore dx
|
|
ENDM
|
|
|
|
;-------------------------------------------------------------------------
|
|
; RETRACT_IER macro - retracts ("turns off") selected IER bits
|
|
;-------------------------------------------------------------------------
|
|
; Enter:
|
|
; DX = base port address for UART
|
|
; theseBits = MCR bits to assert (see UART_IER_... definitions, above)
|
|
;-------------------------------------------------------------------------
|
|
; Returns:
|
|
; (nothing)
|
|
;-------------------------------------------------------------------------
|
|
RETRACT_IER MACRO theseBits
|
|
add dx,UART_IER ;move to IER register
|
|
in al,dx ;get contents
|
|
and al,NOT (theseBits) ;turn off bit(s)
|
|
out dx,al
|
|
sub dx,UART_IER ;restore dx
|
|
ENDM
|
|
|
|
;-------------------------------------------------------------------------
|
|
; ASSERT_IIR macro - asserts ("turns on") selected IIR bits
|
|
;-------------------------------------------------------------------------
|
|
; Enter:
|
|
; DX = base port address for UART
|
|
; theseBits = MCR bits to assert (see UART_IIR_... definitions, above)
|
|
;-------------------------------------------------------------------------
|
|
; Returns:
|
|
; (nothing)
|
|
;-------------------------------------------------------------------------
|
|
ASSERT_IIR MACRO theseBits
|
|
add dx,UART_IIR ;move to IIR register
|
|
in al,dx ;get contents
|
|
or al,theseBits ;turn on bit(s)
|
|
out dx,al
|
|
sub dx,UART_IIR ;restore dx
|
|
ENDM
|
|
|
|
;-------------------------------------------------------------------------
|
|
; RETRACT_IIR macro - retracts ("turns off") selected IIR bits
|
|
;-------------------------------------------------------------------------
|
|
; Enter:
|
|
; DX = base port address for UART
|
|
; theseBits = MCR bits to assert (see UART_IIR_... definitions, above)
|
|
;-------------------------------------------------------------------------
|
|
; Returns:
|
|
; (nothing)
|
|
;-------------------------------------------------------------------------
|
|
RETRACT_IIR MACRO theseBits
|
|
add dx,UART_IIR ;move to IIR register
|
|
in al,dx ;get contents
|
|
and al,NOT (theseBits) ;turn off bit(s)
|
|
out dx,al
|
|
sub dx,UART_IIR ;restore dx
|
|
ENDM
|
|
|
|
;-------------------------------------------------------------------------
|
|
; SETFORMAT_AL macro - sets LCR from al
|
|
;-------------------------------------------------------------------------
|
|
; Enter:
|
|
; DX = base port address for UART
|
|
; AL = LCR bits to set (see UART_LCR... definitions, above)
|
|
;-------------------------------------------------------------------------
|
|
; Returns:
|
|
; (nothing)
|
|
;-------------------------------------------------------------------------
|
|
SETFORMAT_AL MACRO
|
|
add dx,UART_LCR ;move to UART_LCR
|
|
out dx,al
|
|
sub dx,UART_LCR ;restore base address
|
|
ENDM
|
|
|
|
;-------------------------------------------------------------------------
|
|
; SETBAUD_CX macro - sets data rate
|
|
;-------------------------------------------------------------------------
|
|
; Enter:
|
|
; DX = base port address for UART
|
|
; CX = data rate value
|
|
;-------------------------------------------------------------------------
|
|
; Returns:
|
|
; (nothing)
|
|
;-------------------------------------------------------------------------
|
|
; Side effects:
|
|
; Modifies AL
|
|
;-------------------------------------------------------------------------
|
|
SETBAUD_CX MACRO
|
|
;---------------------------------
|
|
; Select baud rate division registers
|
|
;---------------------------------
|
|
add dx,UART_LCR ;turn on UART_LCR_ALT
|
|
in al,dx
|
|
or al,UART_LCR_ALT
|
|
out dx,al
|
|
sub dx,UART_LCR ;restore base address
|
|
;---------------------------------
|
|
; Set baud rate division registers
|
|
;---------------------------------
|
|
mov al,cl ;get low divisor in al
|
|
out dx,al ;write to BRDL
|
|
inc dx ;move to high divisor address
|
|
mov al,ch ;get high divisor in al
|
|
out dx,al ;write to BRDH
|
|
dec dx ;restore base address
|
|
;---------------------------------
|
|
; Deselect baud rate division registers
|
|
;---------------------------------
|
|
add dx,UART_LCR ;turn off UART_LCR_ALT
|
|
in al,dx
|
|
and al,NOT UART_LCR_ALT
|
|
out dx,al
|
|
sub dx,UART_LCR ;restore base address
|
|
ENDM
|
|
|
|
;end of PCSERIAL.INC
|