CydandClaude Fable 5
db7745fcd0
Un-ignored: the dev drive is the ground truth the restoration and emulator work constantly reference (DPL3/LIBDPL + VRENDER i860 renderer source, BT/RP live+dev game trees, VGL_LABS pod boot, scene/audio content). Kept in-repo for the pod-owner community. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
343 lines
8.7 KiB
C++
343 lines
8.7 KiB
C++
/*{{{ Copyright*/
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/**************************************************************************/
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/* */
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/* DIVISION */
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/* -------- */
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/* */
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/* (C) Copyright 1990, 1991 DIVISION Limited */
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/* */
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/**************************************************************************/
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/*
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PROJECT: BLASTER
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SUBSYSTEM: CM100 IO
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MODULE: CM100IO_H
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FILE: cm100io.h
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AUTHOR: CHRG
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DATE: 22:03:90
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MODIFIED:
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*/
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/*}}} */
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/*{{{ Function*/
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/*
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FUNCTION:- Defines IO_CONTROL structure and position
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of Command Control Blocks etc.
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*/
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/*}}} */
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#include "dtypes.h"
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#ifndef CM200IO_H
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#define CM200IO_H
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/*
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860 <-> transputer io control register
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*/
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#define IO_CONTROL_BASE 0x00000000
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/*{{{ typedefs*/
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typedef struct SUBSYTEM {
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union RE {
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word error; /* subsystem error READ ONLY */
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word reset; /* subsystem reset WRITE ONLY*/
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} re;
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union AN {
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word analyse; /* subsys analyse WRITE ONLY*/
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word spare; /* spare */
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} an;
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} SUBSYSTEM;
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typedef struct I860INT {
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word clearInt; /* clear i860 Int. on READ */
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word spare;
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} I860INT;
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typedef union CONTROL {
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SUBSYSTEM subsytem;/* subsystem control */
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I860INT i_860; /* i860 Int clear control */
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} CONTROL;
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typedef struct IO_CONTROL {
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CONTROL control; /* subsystem control */
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word ireset; /* 860 reset */
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word ihold; /* 860 hold */
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word tevent; /* transputer event */
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word spare1;
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word ievent; /* 860 interrupt */
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word spare2;
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} IO_CONTROL;
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/*}}} */
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/*{{{ future upgrades*/
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#ifdef future
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/*
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NBB For Beta 1.0 we will stick with the above original
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IO_CONTROL. The functions are correct but difficult to
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follow.
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For Beta 1.1 we will upgrade to the scheme below
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*/
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typedef struct READ_CONTROL {
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word sub_error; /* subsystem error */
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word i860_clear_int; /* initialise i860 Interrupt */
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word clear_event; /* clear event condition */
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word spare1;
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word spare2;
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word spare3;
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word spare4;
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} READ_CONTROL;
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typedef struct WRITE_CONTROL {
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word sub_analyse; /* subsystem analyse */
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word sub_reset; /* subsystem reset */
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word i860_reset; /* i860 reset */
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word i860_hold; /* lock i860 off bus */
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word spare2;
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word spare3;
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word i860_int; /* interrupt i860 */
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} WRITE_CONTROL;
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typedef struct IO_CONTROL {
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union {
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READ_CONTROL read;
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WRITE_CONTROL write;
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};
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} IO_CONTROL;
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#endif
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/*}}} */
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/*{{{ on the ccb's*/
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/*
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Two blocks of shared memory are assigned to command
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transfer. These blocks are defined as Command Control Blocks
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CCB's. One is always used for transputer commands
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initiated by the i860, the other for i860 commands
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initiated by the transputer.
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The command control blocks currently sit right at the
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top of memory just below the peripheral address space.
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Cacheing is disabled for the CCB page.
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Each CCB is protected by a simple Spin Lock. When the
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i860 application attempts an output, the Wait() is called
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on the output_ccb.Lock. This will spin until the Lock is
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clear. The Lock is then set and Wait() returns. The
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output_ccb is then updated, and the I/O processor evented.
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At this point the i860 output routine returns (note the
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Lock is still set). Once the I/O processor event routine
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has finished with the output_ccb it calls Signal() to clear
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the Lock. A similar handshake occurs on input.
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*/
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/*}}} */
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/*{{{ ccb structure*/
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#define INPUT_CCB 0xFFFFF000
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#define OUTPUT_CCB 0xFFFFF300
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#define CCB_DATA_LENGTH 256
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#ifdef IBUG
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#define CLEAR_INT 0xFFFFF000
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#define INT_CLEARED 0xFFFFF004
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#endif
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typedef struct CCB {
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word lock; /* CCB Lock */
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word spare; /* NBB trash area for unlock */
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int command_no; /* unique command instance no.*/
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int command_type; /* command type */
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word ack; /* acknowledge data */
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int control; /* control data */
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byte data[CCB_DATA_LENGTH]; /* command data */
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} CCB;
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/*}}} */
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#if 0
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/*{{{ ccb structure*/
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#define INPUT_CCB 0xFFFFE000
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#define OUTPUT_CCB 0xFFFFE800
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#define CCB_DATA_LENGTH 256
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#ifdef IBUG
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#define CLEAR_INT 0xFFFFF000
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#define INT_CLEARED 0xFFFFF004
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#endif
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typedef struct CCB {
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word lock; /* CCB Lock */
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word spare; /* NBB trash area for unlock */
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int command_no; /* unique command instance no.*/
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int command_type; /* command type */
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word ack; /* acknowledge data */
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int control; /* control data */
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byte data[CCB_DATA_LENGTH]; /* command data */
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} CCB;
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/*}}} */
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#endif
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/*{{{ command types*/
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/* Command Types */
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#define IO_BREAK 1
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#define IO_ACK 2
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#define IO_STRING 3
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#define IO_CHAR 4
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/* Library Entries */
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#define IO_MATHADV_REQ 5
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#define IO_BLOCK_OUT 6
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#define IO_BLOCK_IN 7
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#define IO_DIVNET_IN 8
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#define IO_DIVNET_OUT 9
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#define IO_DIVNET_NODE 10
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#define IO_LINK_OUT 11 /* obsolete these */
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#define IO_LINK_RAST_OUT 12
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#define IO_FFILE 13
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#define IO_TIMER 16
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/* true entries for dncd library */
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#define IO_DNC_SEND 30
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#define IO_DNC_RECEIVE 31
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#define IO_DNC_MYID 32
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#define IO_DNC_NODES 33
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#define IO_DNC_POLL 34
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/* entries for concurrent link driver */
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#define IO_LD_RUN_CCB_DRIVER 41 /* sorry about these gaps chaps */
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#define IO_LD_RUN_DRIVER 42 /* sorry about these gaps chaps */
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#define IO_LD_LINK_IN 43 /* these calls use the spawned link driver */
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#define IO_LD_LINK_OUT 44 /* this should obsolete IO_LINK_OUT */
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#define IO_LD_LINK_IN_2D 45
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#define IO_LD_LINK_OUT_2D 46 /* this should obsolete IO_LINK_RAST_OUT */
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#define IO_LD_LINK_STATUS 47
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#define IO_LD_CCB_LINK_OUT 48 /* same as LINK_OUT, forces copy from CCB */
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/* superVision ! */
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#define IO_RASTER_SV 49 /* supervision raster */
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#define IO_GETPACKET 50
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#define IO_PUTPACKET 51
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#define IO_PXPL5 52
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#define IO_LD_STATUS_IDLE 0
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#define IO_LD_STATUS_INPUTTING 1
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#define IO_LD_STATUS_OUTPUTTING 2
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#define IO_ISERVER 15
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/* types of IO_FFILE */
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#define F_FORMREAD 0
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#define F_FORMWRITE 1
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#define F_CLOSE 2
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#define F_EXIT 3
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/* Test Entries */
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#define IO_TESTINT 20
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#define IO_TESTEVENT 21
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/*}}} */
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/*{{{ define trap vector*/
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/*
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The i860 TRAP VECTOR resides at the top of memory.
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The processor continues execution at this address on TRAP and RESET
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*/
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#define TRAP_VECTOR 0xFFFFFF00
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/*}}} */
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/*{{{ declare externs*/
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/*
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EXTERNAL DATA DECLARATION
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*/
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extern IO_CONTROL *ioc;
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extern CCB *input_ccb;
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extern CCB *output_ccb;
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extern int command_no;
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#ifdef IBUG
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extern word *ClearInt;
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extern word *IntCleared;
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#endif
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/*
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FUNCTION DECLARATIONS
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*/
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extern void buslock(int state);
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extern void reset860(int state);
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extern void setbootmode8(void);
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extern void setbootmode64(void);
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extern void init860Int(void);
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extern void initTEvent(void);
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extern void clear860Int(void);
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extern void clearEvent(void);
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extern void interrupt_860(void);
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extern void init_ccbs(void);
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extern void Wait(word *lock);
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extern void Signal(word *lock);
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extern void gen_ack(int ackno, word data);
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extern void cnbreak(void);
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extern void cnputs(char *);
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extern void cnputc(char);
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extern int cngetc(void);
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/*}}} */
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#endif
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/*END*/
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