CydandClaude Opus 4.8
a89d08e1c9
- vrend410.mng: the production firmware, a HARD dependency of the committed
live pipeline (emu_main.py MAPS['vrend410'].fw loads it) -- the repo couldn't
run the live renderer without it.
- txdn_probe.py / texstore_trace.py / texel_trace.py: standalone reverse-
engineering probes (texture-source/DRAM-write/texel tracing) documenting the
texid-binding and texel-format investigations.
- .gitignore: exclude the firmware-decomp run artifacts (emu860c.pyd rebuildable
from source, *.log/*.pkl/*.png renderer outputs + caches), editor junk, and
the game runtime state/logs written by running the pod.
Left untouched deliberately: the parallel Mech session's in-progress
restoration/source410/BT/{EMITTER,BTPLAYER}.CPP edits (theirs to commit) and
the tracked game runtime state (LAST.EGG/CTMIX.CFG etc. -- transient).
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
63 lines
2.6 KiB
Python
63 lines
2.6 KiB
Python
"""Find where the production build stores texels: run the battle wire to the
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first sizable set_texmap_texels + its 0x1a bulk run, watching ALL DRAM writes
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during those commands -> the texel destination + layout + format."""
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import sys, os, struct, collections
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HERE=os.path.dirname(os.path.abspath(__file__))
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sys.path.insert(0,HERE); sys.path.insert(0,os.path.dirname(HERE))
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sys.path.insert(0,r'C:\VWE\TeslaRel410\dpl3-revive\patha')
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import emu860, emu_main, emu860c
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from driver import boot, CpuShim
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from vrboard import A
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ANAME={int(a):a.name for a in A}
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emu860.Mem.log=lambda self,*a,**k:None
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data=open(r'C:/VWE/TeslaRel410/emulator/render-bridge/captures/netdeath-20260708.fifodump','rb').read()
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recs=[]; off=0
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while True:
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i=data.find(b'VPXM',off)
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if i<0: break
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ln=struct.unpack_from('<I',data,i+4)[0]; body=data[i+8:i+8+ln]; off=i+8+ln
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if len(body)>=4:
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a=struct.unpack_from('<I',body,0)[0]
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if a<0x100: recs.append((a,body[4:]))
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# find first set_texmap_texels with header n_texels>0 (mode field) then following 0x1a runs
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def w32(p,o): return struct.unpack_from('<I',p,o)[0]
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tex_idx=None
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for i,(a,p) in enumerate(recs):
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if ANAME.get(a)=='set_texmap_texels' and len(p)>=20:
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h=[w32(p,4*k) for k in range(5)]
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# header: remote, n_texels, u, v, mode
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if h[1]>16 and h[2]*h[3]==h[1]:
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tex_idx=i; hdr=h; break
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print("first real texmap @cmd %d: remote=%#x n=%d u=%d v=%d mode=%d"%((tex_idx,)+tuple(hdr)))
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r=boot(fw='vrend410', queue=recs); shim=CpuShim()
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RECV=emu_main.MAPS['vrend410']['receive']
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# advance to just before tex_idx
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while r.qi < tex_idx:
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reason,_=emu860c.run(500_000_000)
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if reason==3: continue
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pc=emu860c.getstate()['pc']; h=r.hooks.get(pc)
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if h is None: break
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if h: h(shim)
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# now watch writes across tex_idx and the next ~10 commands (the 0x1a bulk)
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emu860c.watch_add(0x08000000, 0x0c000000)
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emu860c.watch_drain()
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stop_qi=tex_idx+12
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while r.qi < stop_qi:
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reason,_=emu860c.run(200_000_000)
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if reason==3: continue
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pc=emu860c.getstate()['pc']; h=r.hooks.get(pc)
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if h is None: break
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if h: h(shim)
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raw=emu860c.watch_drain()
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vals=struct.unpack('<%dI'%(len(raw)//4), raw)
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addrs=vals[0::2]
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pages=collections.Counter(a>>12 for a in addrs)
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print("write pages during texmap upload (top 12):")
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for pg,n in pages.most_common(12):
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print(" %#x000 : %d"%(pg,n))
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# dump a sample of the biggest page's writes to see texel format
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top=pages.most_common(1)[0][0]<<12
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sample=[(addrs[k], vals[2*k+1]) for k in range(len(addrs)) if (addrs[k]>>12)==(top>>12)][:8]
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print("sample writes @%#x:"%top)
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for a,v in sample: print(" %#010x <- %08x"%(a,v))
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