CydandClaude Fable 5
40ad8e3b27
galdecode.py applies the GAL20V8 complex-mode fuse geometry (tables from MAME jedutil.cpp) to GAL20v8a_5764.JED with pin names from schematic sheet 1. Result triple-checks: schematic net names, firmware $A0xx accesses, and the chip's UES signature — which VWE programmed as 'U7'. Memory map: $2000-$9FFF SRAM (E-qualified), $A000 display write port, $A010 pod-bus latch, $A020-$A03F HCTL-2016 counters (A3 byte select via NOT_A3), $C000-$FFFF EPROM (explains the FF-padded dump), with OE* = E&R/W as the shared read enable. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
24 lines
226 B
Plaintext
24 lines
226 B
Plaintext
# U7 (GAL20V8A, "20L8" on schematic RIO_1407 sheet 1) pin -> net name
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1 A15
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2 A14
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3 A13
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4 A12
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5 A11
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6 A10
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7 A9
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8 A8
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9 A7
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10 A6
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11 A5
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13 A4
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14 E
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23 RW
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16 A3
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15 ROM_SEL
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22 OE
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21 NOT_A3
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20 PH_SEL
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19 RAM_SEL
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18 BRD_SEL
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17 DSP_SEL
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