CydandClaude Fable 5
40ad8e3b27
galdecode.py applies the GAL20V8 complex-mode fuse geometry (tables from MAME jedutil.cpp) to GAL20v8a_5764.JED with pin names from schematic sheet 1. Result triple-checks: schematic net names, firmware $A0xx accesses, and the chip's UES signature — which VWE programmed as 'U7'. Memory map: $2000-$9FFF SRAM (E-qualified), $A000 display write port, $A010 pod-bus latch, $A020-$A03F HCTL-2016 counters (A3 byte select via NOT_A3), $C000-$FFFF EPROM (explains the FF-padded dump), with OE* = E&R/W as the shared read enable. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
92 lines
3.4 KiB
Python
92 lines
3.4 KiB
Python
"""Decode a GAL20V8 JED (complex mode) into boolean equations.
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Fuse-map semantics taken from MAME jedutil.cpp (config_gal20v8_pins,
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get_pin_fuse_state, is_gal20v8_product_term_enabled,
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does_output_enable_fuse_row_allow_output).
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"""
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import re
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import sys
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JEDPATH = sys.argv[1] if len(sys.argv) > 1 else r"C:\VWE\riojoy\docs\hardware\gal\GAL20v8a_5764.JED"
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QF = 2706
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fuses = [0] * QF # *F0 default
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text = open(JEDPATH).read()
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for m in re.finditer(r"\*L(\d+)\s+([01]+)", text):
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start = int(m.group(1))
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for i, ch in enumerate(m.group(2)):
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fuses[start + i] = int(ch)
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SYN, AC0 = fuses[2704], fuses[2705]
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mode = {(1, 1): "complex", (1, 0): "simple", (0, 1): "registered", (0, 0): "registered"}[(SYN, AC0)]
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print(f"SYN={SYN} AC0={AC0} -> {mode} mode")
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assert mode == "complex", "decoder only handles complex mode"
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# UES signature 2568-2631, 8 bytes MSB-first
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ues = bytes(
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int("".join(map(str, fuses[2568 + 8 * i : 2576 + 8 * i])), 2) for i in range(8)
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)
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print("UES signature:", ues, "->", ues.decode("ascii", "replace"))
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# complex-mode column map: pin -> (lowfusecolumn, highfusecolumn)
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COLS = {1: (3, 2), 2: (1, 0), 3: (5, 4), 4: (9, 8), 5: (13, 12), 6: (17, 16),
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7: (21, 20), 8: (25, 24), 9: (29, 28), 10: (33, 32), 11: (37, 36),
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13: (39, 38), 14: (35, 34), 16: (31, 30), 17: (27, 26), 18: (23, 22),
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19: (19, 18), 20: (15, 14), 21: (11, 10), 23: (7, 6)}
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# complex-mode rows: pin -> (OE row fuse, first PT fuse, last PT fuse)
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ROWS = {22: (0, 40, 280), 21: (320, 360, 600), 20: (640, 680, 920),
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19: (960, 1000, 1240), 18: (1280, 1320, 1560), 17: (1600, 1640, 1880),
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16: (1920, 1960, 2200), 15: (2240, 2280, 2520)}
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XOR = {15: 2567, 16: 2566, 17: 2565, 18: 2564, 19: 2563, 20: 2562, 21: 2561, 22: 2560}
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# Optional net names for pins, filled after reading the schematic:
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NAMES = {}
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if len(sys.argv) > 2:
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for kv in open(sys.argv[2]):
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kv = kv.strip()
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if kv and not kv.startswith("#"):
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p, n = kv.split(None, 1)
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NAMES[int(p)] = n
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def name(pin):
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return NAMES.get(pin, f"pin{pin}")
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def pt_enabled(fuserow):
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return fuses[2640 + fuserow // 40] == 1
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def term(fuserow):
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"""Return list of literals, or None if term is always-false, '1' if always-true."""
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lits = []
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for pin in sorted(COLS):
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lo, hi = COLS[pin]
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l, h = fuses[fuserow + lo], fuses[fuserow + hi]
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if l == 0 and h == 1:
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lits.append("/" + name(pin))
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elif l == 1 and h == 0:
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lits.append(name(pin))
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elif l == 0 and h == 0:
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return None # both intact -> always false
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return lits if lits else ["1"]
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for pin in sorted(ROWS, reverse=True):
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oerow, first, last = ROWS[pin]
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oe = term(oerow) if pt_enabled(oerow) else None
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if oe is None:
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print(f"\npin {pin} ({name(pin)}): OE never true -> used as INPUT")
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continue
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pol = "active-HIGH" if fuses[XOR[pin]] else "active-LOW"
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pts = []
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for f in range(first, last + 40, 40):
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if not pt_enabled(f):
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continue
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t = term(f)
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if t is not None:
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pts.append(" & ".join(t))
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lhs = name(pin) if fuses[XOR[pin]] else "/" + name(pin)
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oestr = " & ".join(oe)
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print(f"\npin {pin} ({name(pin)}): {pol}, OE = {oestr}")
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if pts:
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print(f" {lhs} = " + ("\n" + " " * (len(lhs) + 5) + "| ").join(pts))
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else:
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print(f" {lhs} = 0 (no active product terms)")
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