Fix cross-links in imported RIO docs after the move
Sibling links (hardware<->firmware) now resolve within restoration/; links to RIOjoy's PROTOCOL.md and Win32RIO/ (which stayed in the RIOjoy repo) point to gitea web URLs.
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@@ -410,7 +410,7 @@ retired, preserved unmodified.
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Complete map of what the board does — and pointedly does not do — when
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things go wrong. Complements the wedge analysis above; display-side
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detail in [`docs/hardware/display-board-1408.md`](../docs/hardware/display-board-1408.md).
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detail in [`rio-hardware/display-board-1408.md`](../rio-hardware/display-board-1408.md).
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### Host-facing (protocol)
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@@ -38,7 +38,7 @@ as a 20L8, fitted as a GAL20V8A-15LP** — decodes A[8:15] into `ROM_SEL*`
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header (`J4`–`J8`) carrying CHA/CHB from a HEDS-5700. The DB9 COM port goes
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through a MAX231/MAX232-class level shifter; the schematic's `IN_RESET*` from
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the serial side is the hardware behind the **DTR reset pulse** described in
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[PROTOCOL.md](../PROTOCOL.md) §1. The "display interface" block (ALS541
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[PROTOCOL.md](https://gitea.mysticmachines.com/VWE/RIOJoy/src/branch/main/docs/PROTOCOL.md) §1. The "display interface" block (ALS541
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buffers, HEADER14) exports latched data lines `HD[00:04]` + digit address
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`AS0-2` to the display board — this is a memory-mapped port, *not* the pod
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bus. A 22V10 site (U31) is drawn mostly N/C and is **unpopulated** on the
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@@ -79,7 +79,7 @@ Every pod board carries a 74HCT164 whose parallel outputs go to an
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pattern down the cable, the jumper picks which bit this board answers to,
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and 74LS00 gates qualify `RD_SB`/`WR_SB` with that selection. This
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hardware addressing is what the 0x00–0x6F logical input map in
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[PROTOCOL.md](../PROTOCOL.md) ultimately resolves to.
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[PROTOCOL.md](https://gitea.mysticmachines.com/VWE/RIOJoy/src/branch/main/docs/PROTOCOL.md) ultimately resolves to.
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## Peripheral boards
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@@ -161,10 +161,10 @@ amplifier board 2026-07-19).
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## Cross-references
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- [`../PROTOCOL.md`](../PROTOCOL.md) — the 9600 8N1 wire protocol this
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- [`docs/PROTOCOL.md` (RIOjoy)](https://gitea.mysticmachines.com/VWE/RIOJoy/src/branch/main/docs/PROTOCOL.md) — the 9600 8N1 wire protocol this
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hardware speaks; its DTR reset pulse and 0x00–0x6F input map both have
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their physical explanation above.
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- [`../../rio-firmware/`](../../rio-firmware/) — v4.2 EPROM dump (from the
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- [`../rio-firmware/`](../rio-firmware/) — v4.2 EPROM dump (from the
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AM27C512 at U10) and 68HC11 disassembly/patches.
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- [`../Win32RIO/`](../Win32RIO/) — FASA's original Windows driver for the
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- [`docs/Win32RIO/` (RIOjoy)](https://gitea.mysticmachines.com/VWE/RIOJoy/src/branch/main/docs/Win32RIO/) — FASA's original Windows driver for the
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same hardware.
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@@ -66,7 +66,7 @@ re-init (`$C64B`), then left alone.
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**Test mode** — entered by typing the keypad sequence **A, 9, E** on a
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cockpit keypad (`$C1CB` tracks the sequence at `$20F8`); entry sets flag
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`$2421`, shows `F1000000`, and notifies the PC (`TestModeChange`, cmd
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`0x8C` — see [PROTOCOL.md](../PROTOCOL.md)). Within test mode the next
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`0x8C` — see [PROTOCOL.md](https://gitea.mysticmachines.com/VWE/RIOJoy/src/branch/main/docs/PROTOCOL.md)). Within test mode the next
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keypad digit selects a sub-test; **F** ends a sub-test (back to
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`F1000000`), **D** exits test mode (back to `F0000000`).
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@@ -125,7 +125,7 @@ also the RIO's **error annunciator**:
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has been dropping or retrying. Note there is **no threshold in stock
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firmware** — the first event paints `E0000001` permanently; the
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**RIO 4.3** firmware (`make_patch.py --e0thresh`, see
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[RIOv4_2-ANALYSIS.md](../../rio-firmware/RIOv4_2-ANALYSIS.md)) keeps
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[RIOv4_2-ANALYSIS.md](../rio-firmware/RIOv4_2-ANALYSIS.md)) keeps
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the display quiet until a counter reaches 5, and repaints honestly
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after every check self-test.
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- **`dEAd` crash screen** (`$DAB8`, loop at `$DAB2`) — the TX-ISR ring
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@@ -142,7 +142,7 @@ also the RIO's **error annunciator**:
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- [README.md](README.md) — board family, photos, schematic page map
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- [gal/README.md](gal/README.md) — `DSP_SEL*` decode (`$A000-$A00F`,
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write-only) recovered from the GAL fuse map
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- [`rio-firmware/RIOv4_2.disasm.asm`](../../rio-firmware/RIOv4_2.disasm.asm)
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- [`rio-firmware/RIOv4_2.disasm.asm`](../rio-firmware/RIOv4_2.disasm.asm)
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— display routines `$CB20/$CB36/$CB49` (buffer render), `$CB7C` (`F0`),
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`$CBA7` (`F1`), `$CBD2`/`$CBFD` (lamp-test banners), `$CC28` (zeros),
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test dispatcher `$C241`, entry-sequence tracker `$C1CB`
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@@ -44,7 +44,7 @@ full machine output comes from `galdecode.py`, below.)
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`OE*` (`E & R/W`) is the shared read-side output enable for
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EPROM/SRAM/counters; the write-only decodes double as write strobes.
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**Firmware cross-check** — [`RIOv4_2.disasm.asm`](../../../rio-firmware/RIOv4_2.disasm.asm)
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**Firmware cross-check** — [`RIOv4_2.disasm.asm`](../../rio-firmware/RIOv4_2.disasm.asm)
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touches precisely these windows and nothing else in `$A0xx`: digit writes to
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`$A000-$A007`, pod-bus latch writes to `$A010`, and encoder reads at
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`$A021/$A023/$A025/$A027/$A029` + `$A028/$A030-$A038` (five chips × two count
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