Add FLYK render harness from VWETEST diagnostic suite
The production image's VWETEST diagnostic suite provides a clean,
game-independent render harness. FLYK (VGLTEST, 32rtm build, newer
token-based sync) + clear.scn drives the ENTIRE VPX protocol through
the emulated board with zero errors: boot, iserver handshake, i860
download, token sync, scene build, draw_scene, frame-ack, clean exit
('Exiting rendering'). This validates the VPX emulation for an
arbitrary DPL renderer, not just the game.
Notes: the CYCLE flyk is a DOS/4GW build using the OLDER DPL3-style
velocirender_sync (action-check) and needs separate handling; the
VPX/DBE0151 iserver board test + reference TGAs are a future
golden-image validation avenue.
Adds RENDER-HARNESS.md and harness configs (flyk/cycle/alpha1).
Next (Phase 3): flyk DIVRGB.SCN color bars -> decode FIFO geometry
(same DIV-BIZ2 formats as restoration/divformats.py) -> OpenGL.
Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
This commit is contained in:
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# Render harness — FLYK + the VWETEST diagnostic suite
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The production cockpit image `ALPHA_1/VWETEST/` contains VWE's hardware
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diagnostic suite, which turns out to be an excellent, minimal harness for
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developing and validating the VPX board emulation — far simpler than driving
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the full game.
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## What's in VWETEST
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- **`VGLTEST/FLYK.EXE`** — Division's standalone scene *flyer* (`flyk
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<scene.scn> <camera.spl>`). Boots the VPX renderer and draws a scene along a
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camera spline. No game logic, no RIO, no NetNub. Uses the Borland **32RTM**
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extender and the **newer token-based `velocirender_sync`** (the one this
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device already handles). This is the primary harness.
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- **`VGLTEST/*.SCN`** — calibration scenes of increasing complexity:
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`CLEAR.SCN` (black, no geometry), `DIVRGB.SCN` / `DIVBRT.SCN` / `DIVPA.SCN`
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(color-bar / brightness / RGB calibration geometry from `DIVISION/*.BGF`),
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`DIVCAL.SCN`.
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- **`CYCLE/`** — a full render-cycle test: `flyk yip.scn camera.spl` rendering
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real **Red Planet** geometry (`REDPLANT.BGF`) with dynamic objects and events.
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NOTE: this FLYK is a **DOS/4GW** build using the *older* DPL3-style
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`velocirender_sync` (action-check, not token) — it currently hits
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`unexpected action 1 in velocirender_sync` against this device. Two sync
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protocol variants exist; the device implements the newer one.
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- **`VPX/DBE0151`, `VPX/DBI0152`** — low-level board diagnostics that use the
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actual INMOS **`ISERVER.EXE`** to boot a `TEST.BTL` onto the board
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(`RR 0 TEST.BTL`), plus 65 reference `TST00xx.TGA` images. A future avenue for
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validating the raw iserver/link emulation and for golden-image comparison.
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## Validated: full render loop, clean
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```
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emulator\src\src\dosbox-x.exe -conf emulator\flyk.conf
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# (VPXLOG + VPX_RESPOND=1 in the environment)
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```
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`flyk.conf` mounts C: at `ALPHA_1`, runs `flyk clear.scn ..\cycle\camera.spl`
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from `\VWETEST\VGLTEST`. Result — the game-independent DPL app drives the
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**entire** protocol through the emulated board with no errors:
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```
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flyk.exe clear.scn ..\cycle\camera.spl
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load scene, zone=0x1307a0
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fog ... / set background ... / Starting position ...
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added . to USER geometry/material/texture search path
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set tracking to KEYBOARD ...
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hey, read the scene
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Exiting rendering <- rendered, frame-ack fired, clean exit
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```
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The device log shows the expected `sync reply token` handshake and a
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`frame ack (action 9)`. This confirms the VPX emulation (boot → iserver
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handshake → i860 download → token sync → scene build → draw_scene → frame-ack →
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clean shutdown) is correct for an arbitrary DPL renderer, not just the game.
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## Configs (this directory)
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- `flyk.conf` — FLYK + `clear.scn` (minimal render loop). **Works.**
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- `cycle.conf` — CYCLE `yip.scn` real geometry (DOS/4GW FLYK; older sync — WIP).
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- `alpha1.conf` — full game rooted at the production image (`btdpl.ini` config).
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- `rio.conf` — game with the real RIO on COM1 (Phase 5, validated).
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- `respond.conf` — game with the minimal test image.
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## Next (Phase 3): pixels
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Use `flyk DIVRGB.SCN` (color bars) as the first geometry target. The geometry /
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material / texture commands already flow over the FIFO as framed messages
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(`vr_create`, `vr_set_geom_verts` (22), `vr_set_texmap_texels` (23),
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`vr_list_add`, `vr_draw_scene`). Phase 3 decodes those payloads — the same
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DIV-BIZ2 vertex/material formats already implemented in
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`restoration/divformats.py` — into an OpenGL backend and presents to a window,
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turning the emulated board's frame into actual pixels.
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[sdl]
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output=opengl
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[dosbox]
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memsize=32
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machine=svga_s3
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[cpu]
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core=normal
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cputype=pentium
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cycles=20000
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[serial]
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serial1=directserial realport:COM1
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serial2=disabled
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[autoexec]
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mount c "C:\VWE\TeslaRel410\ALPHA_1"
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c:
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cd \REL410\BT
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set VIDEOFORMAT=svga
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set BLASTER=A220 I5 D1 H5 P330 T6
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set TEMP=c:\
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call setenv.bat r s n n
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call showenv.bat
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32rtm.exe -x
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btl4opt.exe -egg test.egg
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32rtm.exe -u
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echo ALPHA1-RUN-DONE
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pause
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[sdl]
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output=opengl
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[dosbox]
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memsize=32
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machine=svga_s3
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[cpu]
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core=normal
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cputype=pentium
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cycles=20000
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[serial]
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serial1=disabled
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serial2=disabled
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[autoexec]
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mount c "C:\VWE\TeslaRel410\ALPHA_1"
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c:
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cd \VWETEST\CYCLE
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set VIDEOFORMAT=svga
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set TEMP=c:\
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call setsvga.bat
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flyk.exe yip.scn camera.spl
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echo CYCLE-DONE rc=%errorlevel%
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pause
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[sdl]
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output=opengl
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[dosbox]
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memsize=32
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machine=svga_s3
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[cpu]
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core=normal
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cputype=pentium
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cycles=20000
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[serial]
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serial1=disabled
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serial2=disabled
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[autoexec]
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mount c "C:\VWE\TeslaRel410\ALPHA_1"
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c:
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cd \VWETEST\VGLTEST
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set VIDEOFORMAT=svga
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set TEMP=c:\
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set DPLARG=/tranny~division\vrendmon.btl~/i860~division\vrend.mng~/device~0x150~/video~svga~/pipes~1~/qual~0x14
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32rtm.exe -x
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flyk.exe clear.scn ..\cycle\camera.spl
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32rtm.exe -u
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echo FLYK-DONE rc=%errorlevel%
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pause
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