e0test: check-exchange acceptance stage for edit 6; record RC1 first-light
After the flip leaves counters over threshold, the tool now sends a CheckRequest (ACKing every status frame) — edit-6 chips must repaint and re-render the E0 readout; 04000000 marks a pre-rc1 chip. Analysis records the stock-chip archaeology (stock also leaves 04000000, but the ungated E0 readout papered over it in period — our fixes exposed it) and RC1's below-threshold first-light PASS (version+check -> F0). Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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@@ -522,6 +522,17 @@ hooked from the handler's final notify (`$C5E4`): `JSR $C70E` (original
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notify), `JSR $CB7C` (repaint `F0000000`), `JSR $D5F2` (re-render the
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E0 readout, which the edit-5 gate suppresses below threshold), `RTS`.
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Built into **`RIOv4_3rc1.bin`** (with edits 1-2 and 5; sha256
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`dc59bd51cae3…`) — awaiting burn + on-hardware verification, after
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which the image is christened RIO 4.3. Prior generations moved to
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`archive/`.
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`dc59bd51cae3…`); prior generations moved to `archive/`.
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Why `04000000` was never seen in period (user-verified by re-slotting
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the ORIGINAL stock chip, 2026-07-19): stock leaves the same stale frame
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after every check, but the ungated E0 readout papers over it at the
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first counter event — `04000000` flashes momentarily, then `E000000x`
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as errors accrue and the reply-latch wedge trips under load. The wedge
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fix plus the E0 threshold gate are what exposed the stale frame.
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**RC1 first-light (burned 2026-07-19): PASS on the below-threshold
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path** — a version+check exchange now leaves the display at `F0000000`.
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Remaining for the RIO 4.3 christening: over-threshold check repaint
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(must re-render the E0 readout), `--e0test` regression, mash
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spot-check.
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