CydandClaude Fable 5
bf3b0f1cc1
The VersionReply builder at $C6EA hardcoded 4.2; --reportversion=4.3 patches the minor operand byte ($C6FF: 02->03). Verified no host software gates on the value (legacy prints it, RIOJoy parses it, native games ignore it — Cyd). Rebuilt RIOv4_3.bin: 69 bytes vs stock, sha 6d67a2fc7713...; docs updated. Chips burned before this edit still announce 4.2 — re-burn to pick up the number; all other bytes match the certified image. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
88 lines
4.6 KiB
Markdown
88 lines
4.6 KiB
Markdown
# RIO board firmware
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- **`RIOv4_2.bin`** — RIO cockpit I/O board firmware **v4.2**, dumped
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2026-07-04 from one of our own boards' EPROM: an **AMD AM27C512-150**
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(64K x 8 UV EPROM, 150ns — the image fills it exactly).
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sha256 `60a88718835c654b6135dbec7721c40ef99dca07df2ad4b57eedeb24037a5f73`.
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For the eventual patched burn: a pin-compatible Winbond W27C512
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(electrically erasable, TL866-friendly) drops straight into the socket;
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the original AMD chip gets labeled and preserved unmodified.
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## First-look analysis (from the image alone, confirmed on hardware)
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- MCU: **Toshiba TMP68HC11** (read off the chip; the code fingerprint
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agrees — 6800-family opcodes with writes into the 68HC11 internal
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register block at `$10xx`).
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- Memory map: image is FF up to **0xC000**; 16KB of code occupies
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`$C000-$FFFF` (EPROM mapped at the top of the HC11 address space).
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- Startup at `$C000`: `SEI; LDS #$8000; STAA $1024 (TMSK2);
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STAA $1022 (TMSK1); ...` then a long `JSR` init chain — textbook HC11
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bring-up.
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- Vector table (`$FFD6-$FFFF`, big-endian):
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- `$FFFE` RESET → `$C000`
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- **`$FFD6` SCI (serial) → `$D630`** — the entry point of the board's
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receive/protocol interrupt handler. The suspected board-side
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DISABLE_AND_DIE-style wedge (see RIO-NOTES.md: the board mirrors the
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game's PCSPAK state machine, and mash-stress leaves the reply path
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dead while the button/event path stays alive) is reachable from here.
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- `$FFE4` → `$C1B2`, `$FFE6` → `$C18E` (timer output-compares); most
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other vectors → `$DB07..$DB3D` stubs.
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## Why this exists
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The remaining RIO reliability issue is board-side: under button-mash
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stress the board's reply/analog state machine wedges (RX dead, TX alive;
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a button press or power cycle revives it), reproduced identically on two
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different USB serial adapters. The game-side half of the protocol was
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binary-patched for tolerance (BTL4OPT patches v2-v4); the board firmware
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is the other half. Plan (RIO-NOTES.md "Board firmware patch plan"):
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disassemble as 68HC11 from `$C000` with the vector entries as roots, find
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the SCI state machine (protocol constants FC=ACK FD=NAK FE=RESTART
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FF=IDLE, idle-reload-4 patterns), patch the early-ACK/error wedge path or
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widen its window, burn a new EPROM, keep this original safe.
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## RIO 4.3 — `RIOv4_3.bin` (current production firmware)
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**Christened 2026-07-19** after full on-hardware certification. Built
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by `make_patch.py --e0thresh=5 --checkrepaint --reportversion=4.3
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RIOv4_2.bin RIOv4_3.bin`; sha256
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`6d67a2fc77130b601fdb0ac02042dd4d0a98ac7e29a8077d588987a81073939c`
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(69 bytes changed vs stock). 9600 baud, native-game compatible. On the
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stock v4.2 base it carries:
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1. **Reply-latch wedge fix** (edits 1-2) — bench-certified.
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2. **E0-display threshold, N=5** (edit 5) — certified: display holds
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`F0000000` through sub-threshold error events, flips to the live
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`E0` readout at the 5th teardown (`E0000105` on the bench).
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3. **Check self-test display repaint** (edit 6) — certified both ways:
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version+check leaves `F0000000` when healthy, and re-renders the E0
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readout when counters are over threshold (`E0000305` on the bench)
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instead of stock's stale `04000000`.
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4. **Version bump** (edit 7, `--reportversion=4.3`) — the VersionReply
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now announces **4.3** (one operand byte at `$C6FF`). Nothing
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host-side validates the value (native games verified not to check
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it). The certification runs below were made on the pre-edit-7 bytes;
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the only delta is the version literal. Chips burned before this edit
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report 4.2 — re-burn to announce 4.3.
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Certification runs (all in `testlogs/` + RIOv4_2-ANALYSIS.md): two
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`--e0test` acceptance passes (display verified by eye at each step) and
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a 120 s mash at **549 presses/min sustained** — zero wedges, board
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counters flat, zero NAK, 247 resends all healed
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(`riomash-rio43rc1-9600-20260719-164901.log`).
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A FastRIO 4.3 variant does not exist yet; when wanted, build it with
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`make_patch.py --baud31250 --widen-ackwait --e0thresh=5 --checkrepaint`
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and run the same acceptance ladder before deploying.
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## Archive
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All prior generations live in [`archive/`](archive/) with their
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disassemblies: `RIOv4_2_patched` (wedge fix only), `_31250`/`_31250v2`
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(FastRIO speed builds), `_62500`/`_125000` (speed-ladder science runs),
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and the `_e0t5` pair (threshold without check-repaint). Bench verdicts
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and per-edit history: RIOv4_2-ANALYSIS.md. The pristine dump
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`RIOv4_2.bin` stays at top level — it is the source every patch builds
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from. RIO 4.3 is in the cockpit socket as of 2026-07-19; the original
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AMD chip and the retired e0t5 burn are labeled and preserved.
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